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AT25DF641A Datenblatt(PDF) 21 Page - Renesas Technology Corp

Teilenummer AT25DF641A
Bauteilbeschribung  64-Mbit, 2.7V Minimum SPI Serial Flash Memory with Dual–I/O Support
PDF  57 Pages
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Hersteller  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

AT25DF641A Datenblatt(HTML) 21 Page - Renesas Technology Corp

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AT25DF641A [DATASHEET]
8793G–DFLASH–02/2022
9.
Protection Commands and Features
9.1
Write Enable
The Write Enable command is used to set the Write Enable Latch (WEL) bit in the Status Register to a Logical 1 state.
The WEL bit must be set before a Byte/Page Program, Erase, Protect Sector, Unprotect Sector, Sector Lockdown,
Freeze Sector Lockdown State, Program OTP Security Register, or Write Status Register command can be executed.
This makes the issuance of these commands a two-step process, thereby reducing the chances of a command being
accidentally or erroneously executed. If the WEL bit in the Status Register is not set prior to the issuance of one of these
commands, then the command will not be executed.
To issue the Write Enable command, the CS pin must first be asserted and the opcode of 06h must be clocked into the
device. No address bytes need to be clocked into the device, and any data clocked in after the opcode will be ignored.
When the CS pin is deasserted, the WEL bit in the Status Register will be set to a Logical 1. The complete opcode must
be clocked into the device before the CS pin is deasserted, and the CS pin must be deasserted on an even byte
boundary (multiples of eight bits); otherwise, the device will abort the operation and the state of the WEL bit will not
change.
Figure 9-1. Write Enable
SCK
CS
SI
SO
MSB
23
1
0
00000110
67
5
4
Opcode
High-impedance



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