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M69897VP Datenblatt(PDF) 3 Page - Mitsubishi Electric Semiconductor |
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M69897VP Datenblatt(HTML) 3 Page - Mitsubishi Electric Semiconductor |
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3 / 10 page ![]() MITSUBISHI ELECTRIC December 2000 3 PDI[15:0]/ PARITYI 50 ½ M69897VP Figure 2 Single-Ended PECL Input DC Termination 180 ½ VDD 0.1 µF 70 ½ PDI[15:0]/ PARITYI M69897VP Figure 3 Single-Ended PECL Input AC Termination PCLKIP PCLKIN 50 ½ 50 ½ M69897VP Figure 4 Differential PECL Input DC Termination for 155.52 MHz Clock. Table 8 Clock Jitter Characteristics SYMBOL MIN TYP MAX UNITS Tjitter Output Jitter 0.1 0.01 10 dB DESCRIPTION F-3dB Fpeak Jitter Transfer (12K-20MHz) Jitter Transfer Peaking CONDITIONS UIrms MHz |
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