DESCRIPTION

The M69897VP multiplexer chip is an integrated serialization SONET OC-48 (2.488 Gbps) interface

device. The chip performs parallel-to-serial functions in conformance with SONET/SDH transmission

standards. The device is suitable for SONET-based ATM applications.

The merits of SOI (Silicon-On-Insulator) technology, such as low voltage operation, low substrate noise

and good compatibility with standard CMOS technology, are fully utilized in the chip design to

achieve low jitter and low power operation and small package outline of 64-pin PQFP.

FEATURES

- Single 1.8 V power supply

- Supports 2.488 Gbps (OC-48, STM-16)

- 16-bit single-ended PECL interface

- On-chip high-frequency PLL for clock generation

- 155.52 MHz reference frequency

- Low power consumption

- Available in 64 PQFP

- Parity check function

APPLICATIONS

- SONET/SDH systems

- Fiber optic systems

- High-speed back plane interconnect and point-to-point data links

MITSUBISHI SEMICONDUCTOR <SOI/CMOS>

M69897VP

16:1 2.488 Gbps Multiplexer

Preliminary

MITSUBISHI ELECTRIC

December 2000

1

Figure 1 Functional Block Diagram

16:1 PARALLEL

TO SERIAL

TIMING

GENERATOR

D-FF

PARITY

CHECK

SDOP/SDON

SCLKOP/

SCLKON

PCLKOP/

PCLKON

PDI[15:0]

PARITYI

PARIERRO

2.488 Gbps

2.488 GHz

155.52 MHz

155.52 Mbps

16

2

2

2

SCLKIP/

SCLKIN

2.488 GHz

2

PCLKIP/

PCLKIN

SELPLL

155.52 MHz

PLL

2

2.488 GHz

2.488 GHz

2

LPF_EXT1/

LPF_EXT2