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November 16, 2007

IDT70P9268

Very Low Power 16K x 16 Synchronous Mobile Multimedia Interface (M2I) Dual Port Static RAM

Industrial Temperature Range

AC Electrical Characteristics Over the Operating Temperature Range

(Read and Write Cycle Timing for Multiplexed Port) (VDD = 1.8V +/- 100mV)

70P9268L

Ind. Only

Symbol

Parameter

Min.

Max.

Unit

tCYC

Clock Cycle Time

20

--

ns

tCH

Clock High Time

8

--

ns

tCL

Clock Low Time

8

--

ns

tR

Clock Rise Time

--

3

ns

tF

Clock Fall Time

--

3

ns

tSA

Address Setup Time

5

--

ns

tHA

Address Hold Time

1

--

ns

tSB

Bite Enable Setup Time

5

--

ns

tHB

Bite Enable Hold Time

1

--

ns

tSC

Chip Enable Setup Time

5

--

ns

tHC

Chip Enable Hold Time

1

--

ns

tSW

R/W Setup Time

5

--

ns

tHW

R/W Hold Time

1

--

ns

tSD

Input Data Setup Time

5

--

ns

tHD

Input Data Hold Time

1

--

ns

tSAD

ADS Setup Time

5

--

ns

tHAD

ADS Hold Time

1

--

ns

tSCN

CNTEN Setup Time

5

--

ns

tHCN

CNTEN Hold Time

1

--

ns

tSRST

CNTRST Setup Time

5

--

ns

tHRST

CNTRST Hold Time

1

--

ns

tOE

Output Enable to Data Valid

--

10

ns

tOLZ

Output Enable to Low Z

2

--

ns

tOHZ

Output Enable to High Z

--

10

ns

tCD

Clock to Data Valid

--

12

ns

tDC

Data Output Hold After Clock High

2

--

ns

tCKHZ

Clock High to Output High Z

2

9

ns

tCKLZ

Clock High to Output Low Z

2

--

ns

tINS

Interrupt Flag Set Time

12

--

ns

tINR

Interrupt Flag Reset Time

12

--

ns

tCO

Clock to Clock Offset

5

--

ns