LTC4260IGN datasheet(11/28 Pages) LINER

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LTC4260

4260f

APPLICATIO S I FOR ATIO

The typical LTC4260 application is in a high availability

system that uses a positive voltage supply to distribute

power to individual cards. The device measures card

voltages and currents and records past and present fault

conditions. The system queries each LTC4260 over the I2C

periodically and reads the stored information.

The basic LTC4260 application circuit is shown in Fig-

ure 1. External component selection is discussed in detail

in the Design Example section.

Turn-On Sequence

The power supply on a board is controlled by placing an

external N-channel pass transistor (Q1) in the power path.

Note that sense resistor (RS) detects current and capacitor

C1 controls the GATE slew rate. Resistor R6 compensates

the current control loop while R5 prevents high frequency

oscillations in Q1. Resistors R1, R2 and R3 provide

undervoltage and overvoltage sensing.

Several conditions must be present before the external

switch can be turned on. First the external supply VDD

must exceed its undervoltage lockout level. Next the

internally generated supply INTVCC must cross its 4.5V

undervoltage threshold. This generates a 60µs to 120µs

power-on-reset pulse. During reset the fault registers are

cleared and the control registers are set or cleared as

described in the register section.

After the power-on-reset pulse, the LTC4260 will go

through the following turn-on sequence. First, the UV and

OV pins must indicate that the input power is within the

acceptable range and the BD_PRST pin must be pulled

low. All of these conditions must be satisfied for duration

of 100ms to ensure that any contact bounce during

insertion has ended.

When these initial conditions are satisfied, the ON pin is

checked. If it is high, the external switch turns on. If it is low,

the external switch turns on when the ON pin is brought high

or if a serial bus turn-on command is received.

The switch is turned on by charging up the GATE with a

18µA current source (Figure 2). The voltage at the GATE

pin rises with a slope equal to 18µA/C1 and the supply

inrush current is set at:

INRUSH

=µ

•

When the GATE voltage reaches the FET threshold voltage,

the switch begins to turn on and the SOURCE voltage

follows the GATE voltage as it increases.

2.67k

1.74k

49.9k

Z1*

SMBT70A

VDD

SENSE

LTC4260GN

100k

FDB3632

0.010Ω

VIN

48V

10Ω

6.8nF

330µF

43.5k

VOUT

48V

3.57k

100k

0.1µF

GATE

INTVCC ADR0 ADR1

ADR2 GND

BD_PRST

TIMER

ADIN

GPIO

4260 F01

SOURCE

SDAI

SDA0

SCL

ALERT

0.1µF

68nF

*DIODES, INC

BACKPLANE PLUG-IN

CARD

SDA

SCL

ALERT

GND

Figure 1. 5A, 48V Card Resident Application

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