| Datenblatt-Suchmaschine für elektronische Bauteile |
|
AD9705BCPZ Datenblatt(PDF) 13 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
AD9705BCPZ Datenblatt(HTML) 13 Page - Analog Devices |
|
13 / 52 page ![]() AD9704/AD9705/AD9706/AD9707 Rev. 0 | Page 13 of 52 AD9705 AD9705 TOP VIEW (Not to Scale) PIN 1 INDICATOR 8 7 6 5 4 3 2 1 NC NC NC DB0 (LSB) DB1 DVDD DB2 DB3 17 18 19 20 21 22 23 24 PIN/SPI/RESET AVDD OTCM IOUTB IOUTA ACOM REFIO FS ADJ NC = NO CONNECT Figure 5. AD9705 Pin Configuration Table 11. AD9705 Pin Function Descriptions Pin No. Mnemonic Description 27 DB9 (MSB) Most Significant Data Bit (MSB). 28 to 32, 1, 2, 4 DB8 to DB1 Data Bit 8 to Data Bit 1. 5 DB0 (LSB) Least Significant Data Bit (LSB). 25 SLEEP/CSB In pin mode, active high powers down chip. In SPI mode, this pin is the serial port chip select (active low). 24 FS ADJ Full-Scale Current Output Adjust. 23 REFIO Reference Input/Output. Serves as reference input when internal reference disabled. Serves as 1.0 V reference output when internal reference activated. Requires a 0.1 μF capacitor to ACOM when internal reference activated. 22 ACOM Analog Common. 21 IOUTA DAC Current Output. Full-scale current is sourced when all data bits are 1s. 20 IOUTB Complementary DAC Current Output. Full-scale current is sourced when all data bits are 0s. 19 OTCM Adjustable Output Common Mode. Refer to the Theory of Operation section for details. 18 AVDD Analog Supply Voltage (1.7 V to 3.6 V). 17 PIN/SPI/RESET Selects SPI mode or pin mode operation. Active high for pin mode operation. Active low for SPI mode operation. Pulse high to reset SPI registers to default values. 16 MODE/SDIO In pin mode, this selects the input data format. Connect to DCOM for straight binary, DVDD for twos complement. In SPI mode, this pin acts as SPI data input/output. 15 CMODE/SCLK In pin mode, this pin selects the clock input type. Connect to CLKCOM for single-ended clock receiver (drive CLK+ and float CLK–). Connect to CLKVDD for differential receiver. In SPI mode, this pin is the serial data clock input. 14 CLKCOM Clock Common. 13 CLK− Differential Clock Input. 12 CLK+ Differential Clock Input. 11 CLKVDD Clock Supply Voltage (1.7 V to 3.6 V). 10, 26 DCOM Digital Common. 6 to 9 NC No Connect. 3 DVDD Digital Supply Voltage (1.7 V to 3.6 V). |
|
Link URL |
| War ALLDATASHEET hilfreich? [ DONATE ] |
Über Alldatasheet | Werbung | Kontakt | Privatsphäre und Datenschutz | Link zum Datenblatt | Linktausch | Hersteller All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |