Nexperia

74HC166; 74HCT166

8-bit parallel-in/serial out shift register

25 °C

-40 °C to +85 °C -40 °C to +125 °C

Symbol Parameter Conditions

Min Typ Max

Min

Max

Min

Max

Unit

Dn, CE to CP; see Fig. 10

VCC = 2.0 V

2

-8

-

2

-

2

-

ns

VCC = 4.5 V

2

-3

-

2

-

2

-

ns

VCC = 6.0 V

2

-2

-

2

-

2

-

ns

PE to CP; see Fig. 10

VCC = 2.0 V

0

-28

-

0

-

0

-

ns

VCC = 4.5 V

0

-10

-

0

-

0

-

ns

th

hold time

VCC = 6.0 V

0

-8

-

0

-

0

-

ns

CP input; see Fig. 8

VCC = 2.0 V

6

19

-

4.8

-

4

-

MHz

VCC = 4.5 V

30

57

-

24

-

20

-

MHz

VCC = 5.0 V; CL = 15 pF

-

63

-

-

-

-

-

MHz

fmax

maximum

frequency

VCC = 6.0 V

35

68

-

28

-

24

-

MHz

CPD

power

dissipation

capacitance

per package;

VI = GND to VCC

[3]

-

41

-

-

-

-

-

pF

74HCT166

CP to Q7; see Fig. 8

[1]

VCC = 4.5 V

-

23

40

-

50

-

60

ns

VCC = 5.0 V; CL = 15 pF

-

20

-

-

-

-

-

ns

MR to Q7; see Fig. 9

VCC = 4.5 V

-

22

40

-

50

-

60

ns

tpd

propagation

delay

VCC = 5.0 V; CL = 15 pF

-

19

-

-

-

-

-

ns

output; see Fig. 8

[2]

tt

transition

time

VCC = 4.5 V

-

7

15

-

19

-

22

ns

CP input HIGH or LOW;

see Fig. 8

VCC = 4.5 V

20

9

-

25

-

30

-

ns

MR input LOW; see Fig. 9

tW

pulse width

VCC = 4.5 V

25

11

-

31

-

38

-

ns

MR to CP; see Fig. 9

trec

recovery

time

VCC = 4.5 V

0

-7

-

0

-

0

-

ns

Dn, CE to CP; see Fig. 10

VCC = 4.5 V

16

8

-

20

-

24

-

ns

PE to CP; see Fig. 10

tsu

set-up time

VCC = 4.5 V

30

15

-

38

-

45

-

ns

Dn, CE to CP; see Fig. 10

VCC = 4.5 V

0

-3

-

0

-

0

-

ns

PE to CP; see Fig. 10

th

hold time

VCC = 4.5 V

0

-13

-

0

-

0

-

ns

CP input; see Fig. 8

VCC = 4.5 V

25

45

-

20

-

17

-

MHz

fmax

maximum

frequency

VCC = 5.0 V; CL = 15 pF

-

50

-

-

-

-

-

MHz

74HC_HCT166

All information provided in this document is subject to legal disclaimers.

© Nexperia B.V. 2021. All rights reserved

Product data sheet

Rev. 5 — 9 August 2021

9 / 17