UPD17708 datasheet(42/358 Pages) RENESAS

42 / 358 page

µPD17704, 17705, 17707, 17708, 17709

Figure 4-2. Configuration of Data Memory (2/3)

(b)

µPD17707, 17708

Note

An identical system register exists.

Cautions 1. The

µPD17707 and 17708 do not have BANKs 10 through 14.

2. Nothing is allocated to addresses 00H through 5FH of BANK15.

System registers

BANK0

Data memory

BANK1

Column address

General registers

System registers (SYSREG)Note

Example

Address 51H

of BANK 0

b3 b2 b1 b0

7 Port register

System registers (SYSREG)Note

123456789 A B C D E F

BANK2

BANK9

BANK15

23456789 A B C DE F

Data buffer

0123456789 A B C DE F

Column address

Fixed to 0

0123456789 A B C DE F

BANK0

Column address

BANK1-BANK3

Column address

BANK4-BANK9

Column address

BANK15

Port register

Fixed to 0

Port input/output selection registers

Nothing is allocated

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