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UPD17708 Datenblatt(PDF) 47 Page - Renesas Technology Corp |
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UPD17708 Datenblatt(HTML) 47 Page - Renesas Technology Corp |
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47 / 358 page ![]() 45 µPD17704, 17705, 17707, 17708, 17709 5.2 System Register List Figure 5-2 shows the configurations of the system registers. Figure 5-2. Configuration of System Registers Address Name Symbol Bit Data 74H 75H 76H 77H 78H 79H 7AH 7BH 7CH 7DH 7EH 7FH Address register (AR) Window register (WR) Bank register (BANK) Data memory row address pointer (MP) Index register (IX) General register pointer (RP) Program status word (PSWORD) System registers AR3 AR2 AR1 AR0 WR BANK IXH MPH IXM MPL IXL RPH RPL PSW b2 b1 b0 b3 b3 b2 b1 b0 b3 b2 b1 b0 b3 b2 b1 b0 b3 b2 b1 b0 b3 b2 b1 b0 b3 b2 b1 b0 M P E 0 b3 b2 b1 b0 b3 b2 b1 b0 b3 b2 b1 b0 b3 b2 b1 b0 B C D b3 b2 b1 b0 C M P C Y ZI X E (RP) (IX) (MP) |
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