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Datenblatt-Suchmaschine für elektronische Bauteile |
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Datenblatt-Suchmaschine für elektronische Bauteile |
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WM8196SCDS/R Datenblatt(PDF) 8 Page - Wolfson Microelectronics plc |
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WM8196SCDS/R Datenblatt(HTML) 8 Page - Wolfson Microelectronics plc |
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8 / 32 page  WM8196 Production Data w PD Rev 4.3 March 2007 8 INPUT VIDEO SAMPLING MCLK VSMP INPUT VIDEO t PER t VSMPSU t VSMPH t VSU t VH t RSU t RH t MCLKL t MCLKH Figure 1 Input Video Timing Note: 1. See Page 14 (Programmable VSMP Detect Circuit) for video sampling description. Test Conditions AVDD = DVDD1 = 5.0V, DVDD2 = 3.3V, AGND = DGND = 0V, TA = 25 °C, MCLK = 24MHz unless otherwise stated. PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS MCLK period tPER 41.6 ns MCLK high period tMCLKH 18.8 ns MCLK low period tMCLKL 18.8 ns VSMP set-up time tVSMPSU 6 ns VSMP hold time tVSMPH 3 ns Video level set-up time tVSU 10 ns Video level hold time tVH 3 ns Reset level set-up time tRSU 10 ns Reset level hold time tRH 3 ns Notes: 1. tVSU and tRSU denote the set-up time required after the input video signal has settled. 2. Parameters are measured at 50% of the rising/falling edge. OUTPUT DATA TIMING MCLK OP[7:0] t PD Figure 2 Output Data Timing |
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