AM263P4 datasheet(67/154 Pages) TI

67 / 154 page

Table 5-115. Output XBAR Signal Descriptions (continued)

SIGNAL NAME [1]

PIN TYPE [2]

DESCRIPTION [3]

ZCZ C PIN [4]

ZCZ S PIN [4]

XBAROUT11

OUTPUTXBAR Signal 11

D16

XBAROUT12

OUTPUTXBAR Signal 12

C17

XBAROUT13

OUTPUTXBAR Signal 13

D15

XBAROUT14

OUTPUTXBAR Signal 14

C15

XBAROUT15

OUTPUTXBAR Signal 15

Table 5-116. External ADC Channel Select XBAR Signal Descriptions

SIGNAL NAME [1]

PIN TYPE [2]

DESCRIPTION [3]

ZCZ C PIN [4]

ZCZ S PIN [4]

ADC_EXTCH_XBAROUT0

External ADC Channel Select XBAR Signal 0

C11, C13

ADC_EXTCH_XBAROUT1

External ADC Channel Select XBAR Signal 1

A11, C14

ADC_EXTCH_XBAROUT2

External ADC Channel Select XBAR Signal 2

C10, C12

ADC_EXTCH_XBAROUT3

External ADC Channel Select XBAR Signal 3

B11, D11

ADC_EXTCH_XBAROUT4

External ADC Channel Select XBAR Signal 4

C9, P15

ADC_EXTCH_XBAROUT5

External ADC Channel Select XBAR Signal 5

A10, R16

A10

ADC_EXTCH_XBAROUT6

External ADC Channel Select XBAR Signal 6

B10, F15

ADC_EXTCH_XBAROUT7

External ADC Channel Select XBAR Signal 7

C18, D9

ADC_EXTCH_XBAROUT8

External ADC Channel Select XBAR Signal 8

B15

ADC_EXTCH_XBAROUT9

External ADC Channel Select XBAR Signal 9

A15

Pin Connectivity Requirements

Ball Number

Ball Name

Pin Connectivity Requirements

SAFETY_ERRORn

This pin must be connected to ground (VSS) through a separate external pull

resistor to ensure it is held to a valid logic low level if a PCB signal trace

is connected and not actively driven by an attached device. The internal pull–

down may be used to hold a valid logic low level if no PCB signal trace is

connected to the ball.

J16

RSVD_J16

This pin must be connected to 1.2 V supply (VDD).

RSVD_T4

RSVD_U1

Each of these pins must be connected (shorted) directly to ground (VSS)

RSVD_U3

RSVD_V2

Each of these pins must be left unconnected.

P15(1)

RSVD_P15(1)

This pin must be left unconnected

TCK

TDI

TMS

Each of these pins must be connected to the corresponding power supply

through separate external pull resistors to ensure these balls are held to

a valid logic high level if a PCB signal trace is connected and not actively

driven by an attached device. The internal pull–up may be used to hold a

valid logic high level if no PCB signal trace is connected to the ball.

A13

B13

I2C0_SCL

I2C0_SDA

Each of these pins must be connected to the corresponding power supply(1)

through separate external pull resistors to ensure these balls are held to a

valid logic high level.

A11

C10

QSPI0_D0 (SOP0)

QSPI0_D1 (SOP1)

SPI0_CLK (SOP2)

SPI0_D0 (SOP3)

Each of these pins must be connected to the corresponding power supply(1)

or ground (VSS) through separate external pull resistors to ensure these

balls are held to a valid logic high or low level as appropriate to select the

desired device boot mode.

U16

T15

ADC_CAL0

ADC_CAL1

If all ADCx_AINy inputs for all ADC instances (ADC[0:4]_AIN[0:5]) are not

used, the ADC_CAL[0:1] analog pins must be connected (shorted) directly to

ground (VSS).

VSYS_MON

If VSYS_MON is not used, this pin may be connected (shorted) directly to

ground (VSS).

ADC ZCZ PIN

ADC[0:4]_AIN[0:5]

Any unused ADCx_AINy input pin for any ADC instance (ADC[0:4]_AIN[0:5])

must be connected (shorted) directly to ground (VSS).

TI Information - Selective Disclosure

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AM263P4, AM263P2, AM263P1, AM263P4-Q1, AM263P2-Q1, AM263P1-Q1

SPRSP81 – OCTOBER 2023

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