CC1010-RTR1 datasheet(97/152 Pages) TI

97 / 152 page

CC1010

SWRS047

Page 97 of 152

17.9 Demodulation and data decision

A block diagram of the digital demodulator

is shown in Figure 25. The IF signal is

sampled and its instantaneous frequency

is detected. The result is decimated and

filtered. In the data slicer the data filter

output is compared to the average filter

output to generate the data output.

The averaging filter is used to find the

average value of the incoming data. While

the averaging filter is running and

acquiring samples, it is important that the

number of high and low bits received is

equal

(e.g.

Manchester

code

balanced preamble).

Therefore all modes, also synchronous

NRZ mode, need a DC balanced preamble

for the internal data slicer to acquire

correct

comparison

level

from

the

averaging filter. The suggested preamble

is a ‘010101…’ bit pattern. The same bit

pattern should also be used in Manchester

mode, giving a ‘011001100110…chip

pattern. This is necessary for the bit

synchronizer to synchronize correctly.

The averaging filter must be locked before

any NRZ data can be received. This can

be done in one of two ways:

•

After receiving the preamble and byte

synchronisation

(see

the

Synchronization

and

preamble

detection section on page 102), set

MODEM1.LOCK_AVG_IN='1' to stop

updating the averaging filter.

•

Set

MODEM1.LOCK_AVG_MODE='1',

and

then

enter

Receive

mode

(RFMAIN.RX_PD=’0’). The averaging

filter will then be automatically locked

after a preset number of baud periods,

programmable in MODEM1.SETTLING.

The settling time is programmable

from 11 to 86 bauds. The average

filter lock status can be read through

MODEM1.AVG_FILTER_STAT.

Please note that the locking is only

automatic in that the lock is enabled

the programmed number of bit periods

after receive mode is entered. The

automatic locking should therefore

only be used in situations where the

transceiver will be switched away from

receive mode as soon as it is

determined that no data is present.

the

averaging

filter

locked

(MODEM1.LOCK_AVG_MODE='1'),

the

acquired value will be kept also after

Power Down or Transmit mode.

After

modem

reset

(MODEM1.MODEM_RESET_N), or a main

reset (using any of the standard reset

sources), the averaging filter is reset.

In a polled receiver system the automatic

locking can be used. This is illustrated in

Figure 26. If the receiver is operated

continuously

and

searching

for

preamble, the averaging filter should be

locked manually as soon as the preamble

is detected. This is shown in Figure 27. If

the data is Manchester coded there is no

need

lock

the

averaging

filter

(MODEM1.LOCK_AVG_IN='0'), as shown in

Figure 28.

The minimum length of the preamble

depends on the acquisition mode selected

and the settling time. Table 31 gives the

minimum recommended number of chips

for the preamble in NRZ and UART

modes. In this context ‘chips’ refer to the

data coding. Using Manchester coding

every bit consists of two ‘chips’. For

Manchester

mode

the

minimum

recommended number of chips is shown

in Table 32.

A special feature in the data filter is a peak

remover acting like a low pass filter. The

peak threshold must be programmed

according to the deviation and expected

frequency

drift.

When

MODEM1.PEAKDETECT

enabled,

MODEM2.PLO should be set such that:

⋅

∆

−

PLO

low

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