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Datenblatt-Suchmaschine für elektronische Bauteile |
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Datenblatt-Suchmaschine für elektronische Bauteile |
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AVR32AP Datenblatt(PDF) 6 Page - ATMEL Corporation |
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AVR32AP Datenblatt(HTML) 6 Page - ATMEL Corporation |
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6 / 181 page  6 32001A–AVR32–06/06 AVR32 2. Programming Model This chapter describes the programming model and the set of registers accessible to the user. It also describes the implementation options in AVR32 AP. 2.1 Architectural compatibility AVR32 AP is fully compatible with the Atmel AVR32B architecture. 2.2 Implementation options 2.2.1 Memory management AVR32 AP implements a full MMU as specified by the AVR32 architecture. 2.2.2 Java support AVR32 AP implements a Java Extention Module (JEM) as defined in the AVR32 architecture. 2.3 Register file configuration The AVR32B architecture specifies that the exception contexts may have a different number of shadowed registers in different implementations. The following shadow model is used in AVR32 AP. Figure 2-1. Register file configuration. Shadowed registers are marked in grey. Application Bit 0 Supervisor Bit 31 PC SR INT0PC FINTPC INT1PC SMPC R7 R5 R6 R4 R3 R1 R2 R0 Bit 0 Bit 31 PC SR R12 INT0PC FINTPC INT1PC SMPC R7 R5 R6 R4 R11 R9 R10 R8 R3 R1 R2 R0 RSR_INT0 SR RSR_EX SR SP_APP SP_SYS RSR_NMI SR R12 R11 R9 R10 R8 Bit 0 Bit 31 PC INT0PC FINTPC INT1PC SMPC R7 R5 R6 R4 R3 R1 R2 R0 Bit 0 Bit 31 PC FINTPC SMPC R7 R5 R6 R4 R3 R1 R2 R0 Bit 0 Bit 31 PC LR_INT3 R12_INT3 R11_INT3 R9_INT3 R10_INT3 R8_INT3 SP_SYS SP_SYS SP_SYS R12 R11 R9 R10 R8 Bit 0 Bit 31 PC INT0PC FINTPC INT1PC SMPC R7 R5 R6 R4 R3 R1 R2 R0 SP_SYS R12 R11 R9 R10 R8 Bit 0 Bit 31 PC INT0PC FINTPC INT1PC SMPC R7 R5 R6 R4 R3 R1 R2 R0 SP_SYS R12 R11 R9 R10 R8 Bit 0 Bit 31 PC INT0PC FINTPC INT1PC SMPC R7 R5 R6 R4 R3 R1 R2 R0 SP_SYS R12 R11 R9 R10 R8 RSR_INT1 SR RSR_INT2 SR RSR_INT3 SR INT0 INT1 INT2 INT3 Exception NMI FINTPC SMPC R7 R5 R6 R4 R3 R1 R2 R0 R12 R11 R9 R10 R8 LR LR LR LR LR LR LR RSR_SUP RAR_INT0 RAR_EX RAR_NMI RAR_INT1 RAR_INT2 RAR_INT3 RAR_SUP |
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