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ST7LITE49M Datenblatt(PDF) 90 Page - STMicroelectronics |
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ST7LITE49M Datenblatt(HTML) 90 Page - STMicroelectronics |
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90 / 188 page ![]() On-chip peripherals ST7LITE49M 90/188 Figure 48. Long range Input Capture timing diagram F9h 00h LT1 F9h 00h LT2 ATH1 & ATL1 00h 0h LT1 ATH1 LT2 ATH2 fOSC/32 TB Counter1 CNTR1 LTIC LTICR ATICRH 00h ATL1 ATL2 ATICRL ATICR = ATICRH[3:0] & ATICRL[7:0] _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ ATH2 & ATL2 _ _ _ |
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