PS700 datasheet(11/38 Pages) MICROCHIP

11 / 38 page

 2004 Microchip Technology Inc.

DS21760F-page 11

PS700

FIGURE 3-1:

SMBus DATA TRANSFER

Figure 3-1 details how data transfer is accomplished on

the SMBus. Depending upon the state of the R/W bit,

two types of data transfer are possible:

Data transfer from a master transmitter to a

slave receiver: The first byte transmitted by the

master is the slave address. Next follows a

number of data bytes. The slave returns an

Acknowledge bit after each received byte.

Data transfer from a slave transmitter to a

master receiver: The first byte (slave address)

is transmitted by the master. The slave then

returns an Acknowledge bit. Next follows a

number of data bytes transmitted by the slave to

the master. The master returns an Acknowledge

bit after all received bytes other than the last

byte. At the end of the last received byte, a ‘Not

Acknowledge’ is returned.

The master device generates all of the serial clock

pulses and the Start and Stop conditions. A transfer is

ended with a Stop condition or with a Repeated Start

condition. Since a Repeated Start condition is also the

beginning of the next serial transfer, the bus will not be

released.

The PS700 may operate in the following two modes:

Slave Receiver mode: Serial data and clock

are received through SDA and SCL. After each

byte is received, an Acknowledge bit is transmit-

ted. Start and Stop conditions are recognized as

the beginning and end of a serial transfer.

Address recognition is performed by hardware

after reception of the slave address and

direction bit.

Slave Transmitter mode: The first byte is

received and handled as in the Slave Receiver

mode. However, in this mode, the direction bit

will indicate that the transfer direction is

reversed. Serial data is transmitted on SDA by

the PS700 while the serial clock is input on SCL.

Start and Stop conditions are recognized as the

beginning and end of a serial transfer.

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