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AMMC-5024 Datenblatt(PDF) 10 Page - AVAGO TECHNOLOGIES LIMITED |
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AMMC-5024 Datenblatt(HTML) 10 Page - AVAGO TECHNOLOGIES LIMITED |
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10 / 10 page ![]() Figure 21. AMMC-5024 Assembly Diagram. VDD VG1 OUT IN Drain bias must be decoupled from RF to lowest operating frequency 4 nH Inductor for operation to 2 GHz bond wire 100 pF Capacitor Gate is decoupled from RF. (Bond wire length is not important) Ordering Information AMMC-5024-W10=10devicespertray AMMC-5024-W50=50devicespertray For product information and a complete list of distributors, please go to our web site: www.avagotech.com Avago, AvagoTechnologies, and the A logo are trademarks of AvagoTechnologies, Limited in the United States and other countries. Data subject to change. Copyright © 2006 AvagoTechnologies, Limited. All rights reserved. Obsoletes 5989-3931EN AV02-0632EN - September 11, 2007 |
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