ADS8317IBDRBT datasheet(23/29 Pages) TI

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LAYOUT

ADS8317

SBAS356A – JUNE 2007 – REVISED SEPTEMBER 2007

The reference should be similarly bypassed with a

μF capacitor. Again, a series resistor and large

For optimum performance, care should be taken with

capacitor can be used to low-pass filter the reference

the physical layout of the ADS8317 circuitry. This

voltage. If the reference voltage originates from an op

caution is particularly true if the reference voltage is

amp, make sure that the op amp can drive the

low and/or the conversion rate is high. At a 250kHz

bypass

capacitor

without

oscillation

(the

series

conversion rate, the ADS8317 makes a bit decision

resistor can help in this case). Keep in mind that

every 167ns. That is, for each subsequent bit

while the ADS8317 draws very little current from the

decision, the digital output must be updated with the

reference on average, there are still instantaneous

results of the last bit decision, the capacitor array

current demands placed on the external input and

appropriately switched and charged, and the input to

reference circuitry.

the comparator settled to a 16-bit level, all within one

clock cycle.

Texas

Instruments'

OPA365

amp

provides

optimum performance for buffering the signal inputs;

The basic SAR architecture is sensitive to spikes on

the OPA350 can be used to effectively buffer the

the power supply, reference, and ground connections

reference input.

that occur just prior to latching the comparator output.

Thus, during any single conversion for an n-bit SAR

Also, keep in mind that the ADS8317 offers no

converter, there are n windows in which large

inherent rejection of noise or voltage variation in

external transient voltages can easily affect the

regards to the reference input. This characteristic is

conversion result. Such spikes might originate from

of particular concern when the reference input is tied

switching

power

supplies,

digital

logic,

and

to the power supply. Any noise and ripple from the

high-power devices, to name a few potential sources.

supply appears directly in the digital results. While

This particular source of error can be very difficult to

high-frequency noise can be filtered out, as described

track down if the glitch is almost synchronous to the

in the previous paragraph, voltage variation resulting

converter

DCLOCK

signal

because

the

phase

from the line frequency (50Hz or 60Hz) can be

difference between the glitch and DCLOCK changes

difficult to remove.

with

time

and

temperature,

causing

sporadic

The GND pin on the ADS8317 should be placed on a

misoperation.

clean ground point. In many cases, this point is the

With these considerations in mind, power to the

analog ground. Avoid connecting the GND pin too

ADS8317 should be clean and well-bypassed. A

close to the grounding point for a microprocessor,

0.1

μF ceramic bypass capacitor should be placed as

microcontroller, or digital signal processor. If needed,

close as possible to the ADS8317 package. In

run a ground trace directly from the converter to the

addition, a 1

μF to 10μF capacitor and a 5Ω or 10Ω

power-supply connection point. The ideal layout

series resistor may be used to low-pass filter a noisy

includes an analog ground plane for the converter

supply.

and associated analog circuitry.

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