±1.0

±0.8

±0.6

±0.4

±0.2

0.0

0.2

0.4

0.6

0.8

1.0

±20

±15

±10

±5

0

5

10

15

20

ADC Differential Peak-to-Peak Input (V)

C030

28

MUX508, MUX509

SBAS758C – JANUARY 2016 – REVISED SEPTEMBER 2016

www.ti.com

Product Folder Links: MUX508 MUX509

Submit Documentation Feedback

Copyright © 2016, Texas Instruments Incorporated

Typical Application (continued)

10.2.2 Detailed Design Procedure

The purpose of this precision design is to design an optimal, high-voltage, multiplexed, data-acquisition system

for highest system linearity and fast settling. The overall system block diagram is illustrated in Figure 42. The

circuit is a multichannel, data-acquisition signal chain consisting of an input low-pass filter, mux, mux output

buffer, attenuating SAR ADC driver, and the reference driver. The architecture allows fast sampling of multiple

channels using a single ADC, providing a low-cost solution. This design systematically approaches each analog

circuit block to achieve a 16-bit settling for a full-scale input stage voltage and linearity for a 10-kHz sinusoidal

input signal at each input channel.

For step-by-step design procedure, circuit schematics, bill of materials, PCB files, simulation results, and test

results, see TI Precision Design TIPD151, 16-Bit, 400-kSPS, 4-Channel Multiplexed Data-Acquisition System

for High-Voltage Inputs with Lowest Distortion.

10.2.3 Application Curve

Figure 43. ADC 16-Bit Linearity Error for the Multiplexed Data-Acquisition Block