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ABSOLUTE MAXIMUM RATINGS

(1)

ELECTRICAL CHARACTERISTICS

DAC5672-EP

SGLS339A – JUNE 2006 – REVISED OCTOBER 2006

over operating free-air temperature range (unless otherwise noted)

UNIT

AVDD(2)

–0.5 V to 4 V

Supply voltage range

DVDD(3)

–0.5 V to 4 V

Voltage between AGND and DGND

–0.5 V to 0.5 V

Voltage between AVDD and DVDD

–0.5 V to 0.5 V

DA[13:0] and DB[13:0](3)

–0.5 V to DVDD + 0.5 V

MODE, CLKA, CLKB, WRTA, WRTB(3)

–0.5 V to DVDD + 0.5 V

Supply voltage range

IOUTA1, IOUTA2, IOUTB1, IOUTB2(2)

–1 V to AVDD + 0.5 V

EXTIO, BIASJ_A, BIASJ_B, SLEEP(2)

–0.5 V to AVDD + 0.5 V

Peak input current (any input)

20 mA

Peak total input current (all inputs)

–30 mA

Operating free-air temperature range

–55

  C to 125  C

Storage temperature range

–65

  C to 150  C

Lead temperature

1,6 mm (1/16 in) from the case for 10 s

260

  C

(1)

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings

only and functional operation of these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)

Measured with respect to AGND

(3)

Measured with respect to DGND

over operating free-air temperature range, AVDD = DVDD = 3.3 V, I

OUTFS = 20 mA, independent gain set mode

(unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP MAX

UNIT

DC Specifications

Resolution

14

Bits

DC Accuracy(1)

TA = 25°C

–4

  1.1

4

INL

Integral nonlinearity

1 LSB = IOUTFS/214

LSB

TA = –55°C and 125°C

–5

  1.1

5

TA = 25°C

–3

  0.75

3

DNL

Differential nonlinearity

1 LSB = IOUTFS/214

LSB

TA = –55°C and 125°C

–4

  0.75

4

Analog Output

Offset error

Mid-scale value

  0.03

%FSR

Offset mismatch

Mid-scale value

  0.03

%FSR

With external reference at 1.25 V

  0.25

Gain error

%FSR

With internal reference

  0.25

Minimum full-scale output current(2)

2

mA

Maximum full-scale output current(2)

20

mA

With external reference

–2

0.2

2

Gain mismatch

%FSR

With internal reference

–2

0.2

2

Output voltage compliance range(3)

–0.8

1.25

V

RO

Output resistance

300

k

Ω

CO

Output capacitance

5

pF

(1)

Measured differentially through 50

Ω to AGND.

(2)

Nominal full-scale current, IOUTFS, equals 32× the IBIAS current.

(3)

The lower limit of the output compliance is determined by the CMOS process. Exceeding this limit may result in transistor breakdown,

resulting in reduced reliability of the DAC5672 device. The upper limit of the output compliance is determined by the load resistors and

full-scale output current. Exceeding the upper limit adversely affects distortion performance and integral nonlinearity.

5

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