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L5965 Datenblatt(PDF) 20 Page - STMicroelectronics

Teilenummer L5965
Bauteilbeschribung  Power management for automotive vision and radar systems
PDF  73 Pages
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Hersteller  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
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L5965 Datenblatt(HTML) 20 Page - STMicroelectronics

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In case of UV fault, RESET_B is asserted according to OTP reset activation and power up sequence. If
PGND1 ground loss occurs, the regulator is turned OFF and the FAULT pin is asserted. RESET_B is
asserted according to OTP reset activation and power up sequence. Until the fault is present and stored
any tentative of turning on the regulator is ignored. BUCK1 can be turned on again after the fault removal
and a Read & Clear cycle.
If this regulator is disabled and not used, VREG1_S and PGND1 pins should be connected to ground.
4.2.3
Pre-regulator BUCK2
The BUCK2 regulator operates using constant frequency peak current mode control. According to OTP selection
about Main BUCK, it can work as Main BUCK pre-regulator (enabled by WKUP pin signal) or as post-regulator.
The input voltage (VBAT2) is compatible with battery level (up to 32 V) and the overvoltage detection of VBAT2
(typ 32 V, available via SPI and enabled by default) can be disabled via SPI (enable by default condition). The
switching frequency is set via OTP to 0.4/2.4 MHz with the possibility to have Spread Spectrum (enabled by
default and disabled via SPI); a phase shift of 180° versus BUCK1 is internally generated. Output voltage is
programmable with internal OTP cells to 8 possible values (5.0 V, 3.6 V, 3.3 V, 1.5 V, 1.35 V, 1.2 V, 1.1 V or 1.0
V). Over current protection can be set via OTP to 1.5 A or to 3 A. Soft start time and power stage driver slew rates
(change in Trise and Tfall) can be independently set via SPI. Compensation network is external.
The BUCK2 regulator provides the following diagnostics:
Monitor of the output voltage by an independent circuit for UV/OV detection: thresholds are set via SPI.
Monitor of the Power Good thresholds is set via SPI (at 5/10% of VBUCK2) but the information is not
available on the bus in active mode.
Over Current Protection (with 2 selectable values by OTP) on High Side FET.
Over Temperature detection by a local thermal sensor.
PGND2 loss detection. An external schottky diode is necessary to protect the power stage in case of
ground loss.
If BUCK2 is set as Main BUCK pre-regulator:
If a UV/OV fault occurs then Fault pin is asserted and the corresponding fault bit is set inside the SPI
register, where it can be read and cleared. RESET_B is always asserted in case of UV. In case of OV, it is
possible to enable or disable the reset for all regulators together by OTP. The reset moves the device to
REC state.
If OT occurs, the power stage is switched OFF with a 16 µs filter time. The output decreases until UV is
detected. The regulator goes in REC state and can restart only when OT flag is reset. The corresponding
SPI bit is set and FAULT pin is asserted.
The over current limitation is a cycle by cycle protection: when the fault happens, the corresponding fault
bit (Buck_OC_STAT) is set in the SPI register. This bit doesn't change the regulator behavior. If the fault
happens for 7 consequent cycles, the FAULT pin is asserted (latched).
If PGND2 ground loss occurs, all regulators are turned OFF, FAULT and RESET_B pins are asserted and
the device goes back to REC state. Until the fault is present any tentative of turning on the regulator is
ignored.
If BUCK2 is set as BUCK post-regulator we have the same behavior as above, except that:
In case of UV fault, RESET_B is asserted according to OTP reset activation and power up sequence.
If PGND2 ground loss occurs, the regulator is turned OFF and Fault pin is asserted. RESET_B is asserted
according to OTP reset activation and power up sequence. Until the fault is present and stored any
tentative of turning on the regulator is ignored. BUCK2 can be turned on again after the fault removal, Read
& Clear cycle.
If this regulator is disabled and not used, VREG2_S and PGND2 pins should be connected to ground.
4.2.4
Post regulator BUCK3
BUCK3 regulator operates using constant frequency peak current mode control. The input voltage (VIN3) is
compatible to the Main regulator output (up to 5.5 V). The switching frequency is 2.4 MHz with the possibility to
have Spread Spectrum (enabled by default and disabled via SPI); a phase shift of 90 ° versus BUCK1 is internally
generated. Output voltage is programmable via OTP cells to 8 possible values (3.3 V, 2.5 V, 2.3 V, 2.0 V, 1.8 V,
1.35 V, 1.2 V, or 1.0 V). The soft start time can be set via SPI. Compensation network is internal.
BUCK3 regulator provides the following diagnostic:
Monitor of the output voltage by an independent circuit for UV/OV detection: thresholds are set via SPI.
L5965
Voltage regulators and features description
DS12567 - Rev 3
page 20/73



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