L5965 datasheet(27/73 Pages) STMICROELECTRONICS

27 / 73 page

It’s recommended to add an external 10 KΩ pull-down resistor on WDI pin to prevent incorrect watchdog

initialization.

The following picture illustrates the watchdog behavior.

Figure 14. Watchdog behavior

Trig=1

Proper trigger in

window mode

WD is working when in ACTIVE mode and OTP bit is enabled

Window

mode

WD off

Long

open

window

WD is stop

WD is working

Shutdown mode

GAPG2306150737PS

The watchdog trigger time is configured by setting SPI. The change of this time is not limited to the Long Open

Window. It can be changed also in "Window mode" state. However, it is suggested to write these bits only during

the long window, in order to avoid watchdog failures. Besides, the first trigger time should be < TLW (160 ms),

after that, next trigger should happen between (previous _Trigger_ time + TSW_min) and (previous _Trigger_ time

+ TSW_max).

Figure 15. Watchdog timing if WD_REC_en = 1

EFW

RSTA

RESET-B

WD-

trigger

Normal operation

Time / ms

Trigger

signal

write

early

trigger

Missing

= missing trigger

= early trigger timing

= correct trigger timing

Normal startup operation and timeout failures

= restart time from REC to INIT then to ACTIVE

RSTA

T = safe trigger window

= early failure window

EFW

T = long open window

GADG1105181220PS

L5965

Voltage regulators and features description

DS12567 - Rev 3

page 27/73

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