ISO7730FDWR datasheet(26/50 Pages) TI2

26 / 50 page

7.3 Feature Description

Table 7-1 provides an overview of the device features.

Table 7-1. Device Features

PART NUMBER

CHANNEL DIRECTION

MAXIMUM DATA

RATE

DEFAULT OUTPUT

PACKAGE

RATED ISOLATION(1)

ISO7730

3 Forward,

0 Reverse

100 Mbps

High

DW-16

5000 VRMS / 8000 VPK

DBQ-16

3000 VRMS / 4242 VPK

ISO7730 with F

suffix

3 Forward,

0 Reverse

100 Mbps

Low

DW-16

5000 VRMS / 8000 VPK

DBQ-16

3000 VRMS / 4242 VPK

ISO7731

2 Forward,

1 Reverse

100 Mbps

High

DW-16

5000 VRMS / 8000 VPK

DBQ-16

3000 VRMS / 4242 VPK

ISO7731 with F

suffix

2 Forward,

1 Reverse

100 Mbps

Low

DW-16

5000 VRMS / 8000 VPK

DBQ-16

3000 VRMS / 4242 VPK

ISO7731B

2 Forward,

1 Reverse

100 Mbps

High

DW-16

5000 VRMS / 8000 VPK

ISO7731B with F

suffix

2 Forward,

1 Reverse

100 Mbps

Low

DW-16

5000 VRMS / 8000 VPK

(1)

See Section 5.7 for detailed isolation ratings.

7.3.1 Electromagnetic Compatibility (EMC) Considerations

Many applications in harsh industrial environment are sensitive to disturbances such as electrostatic discharge

(ESD), electrical fast transient (EFT), surge and electromagnetic emissions. These electromagnetic disturbances

are regulated by international standards such as IEC 61000-4-x and CISPR 22. Although system-level

performance and reliability depends, to a large extent, on the application board design and layout, the ISO773x

family of devices incorporates many chip-level design improvements for overall system robustness. Some of

these improvements include:

• Robust ESD protection cells for input and output signal pins and inter-chip bond pads.

• Low-resistance connectivity of ESD cells to supply and ground pins.

• Enhanced performance of high voltage isolation capacitor for better tolerance of ESD, EFT and surge events.

• Bigger on-chip decoupling capacitors to bypass undesirable high energy signals through a low impedance

path.

• PMOS and NMOS devices isolated from each other by using guard rings to avoid triggering of parasitic

SCRs.

• Reduced common mode currents across the isolation barrier by providing purely differential internal

operation.

ISO7730, ISO7731

SLLSES0K – SEPTEMBER 2016 – REVISED SEPTEMBER 2025

www.ti.com

Submit Document Feedback

Product Folder Links: ISO7730 ISO7731

ISO7730FDWR Datenblatt(PDF) 26 Page - Texas Instruments

ISO7730FDWR Datenblatt(HTML) 26 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50

Datenblatt Download

Link URL