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CY28400 Datenblatt(PDF) 4 Page - SpectraLinear Inc

Teilenummer CY28400
Bauteilbeschribung  100 MHz Differential Buffer for PCI Express and SATA
PDF  12 Pages
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Hersteller  SPECTRALINEAR [SpectraLinear Inc]
Direct Link  http://www.spectralinear.com
Logo SPECTRALINEAR - SpectraLinear Inc

CY28400 Datenblatt(HTML) 4 Page - SpectraLinear Inc

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CY28400
Rev 1.0, November 21, 2006
Page 4 of 12
1
1
PLL/Bypass#
PLL/Bypass#
0 = Fanout buffer, 1 = PLL mode
0
1
SRC_DIV/2
0 = Divided by 2 mode,1 = Normal (output = input)
Byte 1: Control Register 1
Bit
@Pup
Name
Description
71
Reserved
6
1
DIFT/C6
DIFT/C6 Output Enable
0 = Disabled (three-state), 1 = Enabled
5
1
DIFT/C5
DIFT/C5 Output Enable
0 = Disabled (three-state), 1 = Enabled
41
Reserved
31
Reserved
2
1
DIFT/C2
DIFT/C2 Output Enable
0 = Disabled (three-state), 1 = Enabled
1
1
DIFT/C1
DIFT/C1 Output Enable
0 = Disabled (three-state), 1 = Enabled
01
Reserved
Byte 2: Control Register 2
Bit
@Pup
Name
Description
70
Reserved
6
0
Allow Control DIFT/C6 with assertion of SRC_STOP#
0 = Free-running, 1 = Stopped with SRC_STOP#
5
0
Allow Control DIFT/C5 with assertion of SRC_STOP#
0 = Free-running, 1 = Stopped with SRC_STOP#
40
Reserved
30
Reserved
2
0
Allow Control DIFT/C2 with assertion of SRC_STOP#
0 = Free-running, 1 = Stopped with SRC_STOP#
1
0
Allow Control DIFT/C1 with assertion of SRC_STOP#
0 = Free-running, 1 = Stopped with SRC_STOP#
00
Reserved
Byte 3: Control Register 3
Bit
@Pup
Name
Description
70
Reserved
60
Reserved
50
Reserved
40
Reserved
30
Reserved
20
Reserved
10
Reserved
00
Reserved
Byte 0: Control Register 0 (continued)
Bit
@Pup
Name
Description



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