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M25P32-VMP6TP Datenblatt(PDF) 22 Page - Numonyx B.V

Teilenummer M25P32-VMP6TP
Bauteilbeschribung  32-Mbit, low voltage, serial Flash memory with 75 MHz SPI bus interface
PDF  53 Pages
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Hersteller  NUMONYX [Numonyx B.V]
Direct Link  http://www.numonyx.com
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M25P32-VMP6TP Datenblatt(HTML) 22 Page - Numonyx B.V

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Instructions
M25P32
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6.2
Write Disable (WRDI)
The Write Disable (WRDI) instruction (Figure 9) resets the Write Enable Latch (WEL) bit.
The Write Disable (WRDI) instruction is entered by driving Chip Select (S) Low, sending the
instruction code, and then driving Chip Select (S) High.
The Write Enable Latch (WEL) bit is reset under the following conditions:
●
Power-up
●
Write Disable (WRDI) instruction completion
●
Write Status Register (WRSR) instruction completion
●
Page Program (PP) instruction completion
●
Sector Erase (SE) instruction completion
●
Bulk Erase (BE) instruction completion
Figure 9.
Write Disable (WRDI) instruction sequence
C
D
AI03750D
S
Q
2
1
34567
High Impedance
0
Instruction



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