AT25DF021A-UUN-T datasheet(8/59 Pages) RENESAS

8 / 59 page

DS-AT25DF021A-042 Rev. L

Page 8

8/7/23

AT25DF021A Datasheet

HOLD

The HOLD pin is used to temporarily pause serial communication without deselecting or

resetting the device. While the HOLD pin is asserted, transitions on the SCK pin and data on

the SI pin is ignored, and the SO pin is in a high-impedance state.

The CS pin must be asserted, and the SCK pin must be in the low state in order for a Hold

condition to start. A Hold condition pauses serial communication only and does not have an

effect on internally self-timed operations such as a program or erase cycle. See “Hold” on page

42 for additional details on the Hold operation.

The HOLD pin is internally pulled-high and can be left floating if the Hold function is not used.

However, it is recommended that the HOLD pin also be externally connected to VCC whenever

possible.

Low

Input

VCC

DEVICE POWER SUPPLY

The VCC pin is used to supply the source voltage to the device.

Do not attempt operations at invalid VCC voltages because they might produce spurious results.

Power

GND

GROUND

The ground reference for the power supply. GND must be connected to the system ground.

Power

Figure 1. 8-SOIC Top View

Figure 2. 8-UDFN (Top View)

Figure 3. 8-TSSOP Top View

Figure 4. WLCSP Top View

Table 1. Pin Descriptions (Continued)

Symbol

Name and Function

Asserted

State

Type

SO (IO )

GND

VCC

HOLD

SCK

SI (IO )

SO (IO )

GND

VCC

HOLD

SCK

SI (IO )

SO (IO )

GND

VCC

HOLD

SCK

SI (IO )

GND

VCC

SCK

HOLD

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