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AS7038RB

Functional Description

Datasheet

• PUBLIC

DS000726

• v2-00 • 2021-Jun-02

126

│ 55

SEQ_ADC2TIA (Address 0x43)

Figure 61:

SEQ_ADC2TIA Register

Addr: 0x43

SEQ_ADC2TIA

Bit

Bit Name

Default

Access

Bit Description

7:0

seq_adc2tia

ADC second sampling time for TIA: If this time is

non-zero, an ADC conversion is started at the

given cycle, but only if adc_sel is currently

selecting TIA. For all other channels, there is only

a single ADC conversion executed in the

sequencer period.

Warning: If non-zero, seq_adc must be non-zero

as well, and seq_adc2tia bigger than seq_adc.

The difference must be high enough so that the

second ADC conversion is started after the first

ADC conversion has finished.

Also, if the seq_adc2tia features is used, there is

the additional restriction that the second ADC

conversion has to be finished before the end of

the sequencer period.

SEQ_ADC3TIA (Address 0x44)

Figure 62:

SEQ_ADC3TIA Register

Addr: 0x44

SEQ_ADC3TIA

Bit

Bit Name

Default

Access

Bit Description

7:0

seq_adc3tia

ADC third sampling time for TIA: same as

seq_adc2tia. Also must make sure to not overlap

ADC conversions! Also, adc3tia must be after

adc2tia

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