MPC860EC datasheet(5/80 Pages) FREESCALE

5 / 80 page

MPC860 PowerQUICC™ Family Hardware Specifications, Rev. 8

Freescale Semiconductor

Features

— Up to 8 Kbytes of dual-port RAM

— 16 serial DMA (SDMA) channels

— Three parallel I/O registers with open-drain capability

•

Four baud-rate generators (BRGs)

— Independent (can be tied to any SCC or SMC)

— Allows changes during operation

— Autobaud support option

•

Four serial communications controllers (SCCs)

— Ethernet/IEEE 802.3® standard optional on SCC1–4, supporting full 10-Mbps operation

(available only on specially programmed devices)

— HDLC/SDLC (all channels supported at 2 Mbps)

— HDLC bus (implements an HDLC-based local area network (LAN))

— Asynchronous HDLC to support point-to-point protocol (PPP)

— AppleTalk

— Universal asynchronous receiver transmitter (UART)

— Synchronous UART

— Serial infrared (IrDA)

— Binary synchronous communication (BISYNC)

— Totally transparent (bit streams)

— Totally transparent (frame-based with optional cyclic redundancy check (CRC))

•

Two SMCs (serial management channels)

— UART

— Transparent

— General circuit interface (GCI) controller

— Can be connected to the time-division multiplexed (TDM) channels

•

One SPI (serial peripheral interface)

— Supports master and slave modes

— Supports multimaster operation on the same bus

•

One I2C (inter-integrated circuit) port

— Supports master and slave modes

— Multiple-master environment support

•

Time-slot assigner (TSA)

— Allows SCCs and SMCs to run in multiplexed and/or non-multiplexed operation

— Supports T1, CEPT, PCM highway, ISDN basic rate, ISDN primary rate, user defined

— 1- or 8-bit resolution

— Allows independent transmit and receive routing, frame synchronization, and clocking

MPC860EC Datenblatt(PDF) 5 Page - Freescale Semiconductor, Inc

MPC860EC Datenblatt(HTML) 5 Page - Freescale Semiconductor, Inc

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