MPC860EC datasheet(76/80 Pages) FREESCALE

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MPC860 PowerQUICC™ Family Hardware Specifications, Rev. 8

Freescale Semiconductor

Document Revision History

15 Document Revision History

Table 35 lists significant changes between revisions of this hardware specification.

Table 35. Document Revision History

Revision

Date

Changes

5.1

11/2001

• Revised template format, removed references to MAC functionality, changed Table 7

B23 max value @ 66 MHz from 2ns to 8ns, added this revision history table

10/2002

• Added the MPC855T. Corrected Figure 26 on page -36.

6.1

11/2002

• Corrected UTOPIA RXenb* and TXenb* timing values

• Changed incorrect usage of Vcc to Vdd

• Corrected dual port RAM to 8 Kbytes

6.2

8/2003

• Changed B28a through B28d and B29d to show that TRLX can be 0 or 1

• Changed reference documentation to reflect the Rev 2 MPC860 PowerQUICC Family

Users Manual

• Nontechnical reformatting

6.3

9/2003

• •Added Section 11.2 on the Port C interrupt pins

• •Nontechnical reformatting

7.0

9/2004

• Added a tablefootnote to Table 6 DC Electrical Specifications about meeting the VIL

Max of the I2C Standard

• Replaced the thermal characteristics in Table 4 by the ZQ package

• Add the new parts to the Ordering and Availablity Chart in Table 34

• Added the mechanical spec of the ZQ package in Figure 78

• Removed all of the old revisions from Table 5

08/2007

• Updated template.

• On page 1, added a second paragraph.

• After Table 2, inserted a new figure showing the undershoot/overshoot voltage

(Figure 1) and renumbered the rest of the figures.

•In Figure 3, changed all reference voltage measurement points from 0.2 and 0.8 V to

50% level.

•In Table 16, changed num 46 description to read, “TA assertion to rising edge ...”

•In Figure 46, changed TA to reflect the rising edge of the clock.

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