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ADUCM310 Datenblatt(PDF) 9 Page - Analog Devices |
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ADUCM310 Datenblatt(HTML) 9 Page - Analog Devices |
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9 / 28 page ![]() ADuCM310 Data Sheet Rev. A Page 8 of 27 Parameter Min Typ Max Unit Test Conditions/Comments Transconductance Analog input signal coupled on to CDAMP_IDACx pin via 1 nF capacitor; frequency range = 100 kHz to 1000 kHz; voltage is the peak to peak voltage on the CDAMP_IDACx pin of the associated IDAC; current is peak-to-peak current change IDAC0 and IDAC1 7.99/100 mA/mV IDAC2 12.6/100 mA/mV IDAC3 18.6/100 mA/mV IDAC4 and IDAC5 1.16/100 mA/mV IDAC Shutdown Temperature 125 °C Die temperature; enabled via IDACxCON[6] VDAC CHANNEL SPECIFICATIONS5, 8, 9 DC Accuracy Resolution 12 Bits Relative Accuracy VDAC0, VDAC1, and VDAC2 −6 ±1 +10 LSB VDAC4 and VDAC5 −7 ±2 +11 LSB VDAC3, VDAC6, and VDAC7 −7 ±2 +8 LSB Differential Nonlinearity −0.99 ±0.6 +1 LSB Guaranteed monotonic Offset Error Calculated ±5 mV 2.5 V internal reference Actual Measured at Code 0 VDAC0, VDAC1, VDAC4, and VDAC5 4 7 mV VDAC6 and VDAC7 15 22 mV VDAC2 and VDAC3 −30 −20 mV Full-Scale Error ±0.7 % of full scale For VDAC2, VDAC3, VDAC4, VDAC5, and VDAC6 VDAC0, VDAC1, and VDAC71 ±0.7 % With 500 Ω load VDAC0 and VDAC1 ±0.5 % With 75 Ω load, over full temperature range VDAC7 ±0.5 % With 100 Ω load, over full temperature range Gain Mismatch Error 0.1 % VDAC0 relative to VDAC1 0.2 % VDAC2 relative to VDAC3 0.1 % VDAC4 relative to VDAC5 0.35 % VDAC6 relative to VDAC7; both driving a 500 Ω load Offset Error Drift Calculated VDAC0, VDAC1, VDAC4, and VDAC5 ±5 µV/°C VDAC2, VDAC3, VDAC6, and VDAC7 ±25 µV/°C Actual Measured at Code 0 VDAC0, VDAC1, VDAC4, and VDAC5 ±13 µV/°C VDAC2, VDAC3, VDAC6, and VDAC7 ±75 µV/°C |
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