ST7SCR datasheet(67/102 Pages) STMICROELECTRONICS

67 / 102 page

ST7SCR

67/102

SMARTCARD INTERFACE (Cont’d)

SMARTCARD INTERRUPT ENABLE REGISTER

(CRDIER)

Read/Write

Reset Value: 0000 0000 (00h)

Bit 7 = TXBEM

Transmit buffer empty interrupt

mask.

This bit is set and cleared by software to enable or

disable the TXBE interrupt.

0: TXBE interrupt disabled

1: TXBE interrupt enabled

Bit 6 = Reserved.

Bit 5 = IOVFM

Card Overload Current Interrupt

Mask.

This bit is set and cleared by software to enable or

disable the IOVF interrupt.

0: IOVF interrupt disabled

1: IOVF interrupt enabled

Bit 4= VCRDM

Card Voltage Error Interrupt Mask.

This bit is set and cleared by software to enable or

disable the VCRD interrupt.

0: VCRD interrupt disabled

1: VCRD interrupt enabled

Bit 3 = WTM

Waiting Timer Interrupt Mask.

This bit is set and cleared by software to enable or

disable the Waiting Timer overflow interrupt.

0: WT interrupt disabled

1: WT interrupt enabled

Bit 2 =TXCM

Transmitted Character Interrupt

Mask

This bit is set and cleared by software to enable or

disable the TXC interrupt.

0: TXC interrupt disabled

1: TXC interrupt enabled

Bit 1 =RXCM

Received Character Interrupt Mask

This bit is set and cleared by software to enable or

disable the RXC interrupt.

0: RXC interrupt disabled

1: RXC interrupt enabled

Bit 0 = PARM

Parity Error Interrupt. Mask

This bit is set and cleared by software to enable or

disable the parity error interrupt for parity error.

0: PAR interrupt disabled

1: PAR error interrupt enabled

TXBE

-IOVF

VCRDM

WTM

TXC

RXC

PAR

ST7SCR Datenblatt(PDF) 67 Page - STMicroelectronics

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