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M306V2EEFS Datenblatt(PDF) 45 Page - Renesas Technology Corp

Teilenummer M306V2EEFS
Bauteilbeschribung  SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER
PDF  271 Pages
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Hersteller  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

M306V2EEFS Datenblatt(HTML) 45 Page - Renesas Technology Corp

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Rev.1.40
Oct 06, 2004 page 45 of 269
M306V2ME-XXXFP, M306V2EEFP
Figure 2.5.7 State transition diagram of Power control mode
Main clock is oscillating
Sub clock is stopped
CM04 = “0”
BCLK : f(XIN)/16
CM07 = “0”
CM06 = “0”
CM17 = “1”
CM16 = “1”
BCLK : f(XIN)/4
CM07 = “0”
CM06 = “0”
CM17 = “1”
CM16 = “0”
BCLK : f(XIN)
CM07 = “0”
CM06 = “0”
CM17 = “0”
CM16 = “0”
High-speed mode
BCLK : f(XIN)/2
CM07 = “0”
CM06 = “0”
CM17 = “0”
CM16 = “1”
Medium-speed mode (divided-by-2)
Medium-speed mode (divided-by-16)
Medium-speed mode (divided-by-4)
BCLK : f(XIN)/16
CM07 = “0”
CM06 = “0”
CM17 = “1”
CM16 = “1”
BCLK: f(XIN)/4
CM07 = “0”
CM06 = “0”
CM17 = “1”
CM16 = “0”
BCLK : f(XIN)
CM07 = “0”
CM06 = “0”
CM17 = “0”
CM16 = “0”
BCLK : f(XIN)/2
CM07 = “0”
CM06 = “0”
CM17 = “0”
CM16 = “1”
High-speed mode
Medium-speed mode (divided-by-2)
Medium-speed mode (divided-by-16)
Medium-speed mode (divided-by-4)
Reset
Medium-speed mode
(Divided-by-8 mode)
Low-speed/
low power dissipation
mode
Wait mode
WAIT
instruction
Interrupt
CPU operation stopped
Interrupt
Transition of stop mode, wait mode
Transition of normal mode
Normal mode
Notes 1: Switch clocks after oscillation of main clock is
sufficiently stable.
2: Switch clocks after oscillation of sub-clock is
sufficiently stable.
3: Change CM06 after changing CM17 and
CM16.
4: Transit in accordance with arrows.
High-speed/
medium-speed
mode
Wait mode
WAIT
instruction
Interrupt
CPU operation stopped
Stop mode
CM10 = “1”
All oscillators stopped
Interrupt
Stop mode
CM10 = “1”
All oscillators stopped
Main clock is oscillating
Sub-clock is stopped
Medium-speed mode (divided-by-8 mode)
BCLK : f(XIN)/8
CM07 = “0”
CM06 = “1”
CM04 = “0”
CM04 = “1”
(Notes 1, 3)
Main clock is oscillating
Sub-clock is oscillating
BCLK : f(XCIN)
CM07 = “1”
Main clock is oscillating
Sub-clock is oscillating
Low-speed mode
BCLK : f(XIN)/8
CM07 = “0”
CM06 = “1”
Medium-speed mode (divided-by-8)
CM04 = “1”
CM06 = “0”
(Notes1, 3)
CM06 = “1”
CM05 = “0”
CM05 = “1”
Main clock is stopped
Sub-clock is oscillating
Low power dissipation mode
BCLK : f(XCIN)
CM07 = “1”
CM07 = “0”
(Notes 1, 3)
CM07 = “1”
(Note 2)
Stop mode
CM10 = “1”
All oscillators stopped
Interrupt
Wait mode
WAIT
instruction
Interrupt
CPU operation stopped
(See the figure below as for transition of normal mode)
CM07 = “1”
CM05 = “1”
(Note 2)
CM07 = “0”
CM06 = “0”
CM04 = “0”
(Notes 1, 3)
CM07 = “0”
CM06 = “1”
CM04 = “0”
(Note 1)



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