H8SXSLASH1663 datasheet(365/1158 Pages) RENESAS

365 / 1158 page

Section 6 Bus Controller (BSC)

Rev.1.00 Jun. 07, 2006 Page 313 of 1102

REJ09B0294-0100

• During transfer information read

• During the first data transfer

• During transfer information write back

The DTC releases the bus when the consecutive transfer cycles completed.

(3) DMAC

The DMAC sends the internal bus arbiter a request for the bus when an activation request is

generated. When the DMAC accesses an external bus space, the DMAC first takes control of the

bus from the internal bus arbiter and then requests a bus to the external bus arbiter.

After the DMAC takes control of the bus, it may continue the transfer processing cycles or release

the bus at the end of every bus cycle depending on the conditions.

The DMAC continues transfers without releasing the bus in the following case:

• Between the read cycle in the dual-address mode and the write cycle corresponding to the read

cycle

If no bus master of a higher priority than the DMAC requests the bus and the IBCCS bit in BCR2

is cleared to 0, the DMAC continues transfers without releasing the bus in the following cases:

• During 1-block transfers in the block transfer mode

• During transfers in the burst mode

In other cases, the DMAC transfers the bus at the end of the bus cycle.

(4) External Bus Release

When the

BREQ pin goes low and an external bus release request is issued while the BRLE bit in

BCR1 is set to 1 with the corresponding ICR bit set to 1, a bus request is sent to th

(5) Refresh

When area 2 is specified as the DRAM space or SDRAM space with the RFSHE bit in REFCR set

to 1, RTCNT starts to count up. When the RTCOR value matches RTCNT, a bus request is sent to

the bus arbiter.

A refresh cycle is inserted on completion of the external bus cycle. A refresh cycle is not

consecutively inserted. Once a refresh cycle is inserted, the bus is passed to another bus master.

When the bus is passed, if there is no bus request from other bus masters, NOP cycles are inserted.

H8SX/1663 Datenblatt(PDF) 365 Page - Renesas Technology Corp