H8SXSLASH1663 datasheet(519/1158 Pages) RENESAS

519 / 1158 page

Section 9 I/O Ports

Rev.1.00 Jun. 07, 2006 Page 467 of 1102

REJ09B0294-0100

9.2.9

Port D

(1) PD7/A7, PD6/A6, PD5/A5, PD4/A4, PD3/A3, PD2/A2, PD1/A1, PD0/A0

The pin function is switched as shown below according to the combination of operating mode, the

EXPE bit, and the PDnDDR bit settings.

Setting

I/O Port

Module Name

Pin Function

MCU Operating Mode

PDnDDR

On-chip ROM disabled extended mode



Bus controller

Address output

On-chip ROM enabled extended mode

PDn output

Single-chip mode*

I/O port

PDn input

(initial setting)

Modes other than on-chip ROM

disabled extended mode

[Legend]

0 to 7

Note:

Address output is enabled by setting PDnDDR = 1 in external extended mode

(EXPE = 1)

9.2.10

Port E

(1) PE7/A15, PE6/A14, PE5/A13, PE4/A12, PE3/A11, PE2/A10, PE1/A9, PE0/A8

The pin function is switched as shown below according to the combination of operating mode, the

EXPE bit, and the PEnDDR bit settings.

Setting

I/O Port

Module Name

Pin Function

MCU Operating Mode

PEnDDR

On-chip ROM disabled extended mode



Bus controller

Address output

On-chip ROM enabled extended mode

PEn output

Single-chip mode*

I/O port

PEn input

(initial setting)

Modes other than on-chip ROM

disabled extended mode

[Legend]

0 to 7

Note:

Address output is enabled by setting PDnDDR = 1 in external extended mode

(EXPE = 1)

H8SX/1663 Datenblatt(PDF) 519 Page - Renesas Technology Corp

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