H8SXSLASH1663 datasheet(530/1158 Pages) RENESAS

530 / 1158 page

Section 9 I/O Ports

Rev.1.00 Jun. 07, 2006 Page 478 of 1102

REJ09B0294-0100

Port

Output

Specification

Signal Name

Output

Signal

Name

Signal Selection

Peripheral Module Settings

TIOCB2_OE

TIOCB2

TPU.TIOR2.IOB3 = 0,

TPU.TIOR2.IOB[1,0] = 01/10/11

PO15_OE

PO15

NDERH.NDER15 = 1

TIOCA2_OE

TIOCA2

TPU.TIOR2.IOA3 = 0,

TPU.TIOR2.IOA[1,0] = 01/10/11

PO14_OE

PO14

NDERH.NDER14 = 1

DACK1B_OE

DACK1 PFCR7.DMAS1[A,B] = 01 DACR.AMS = 1,DMDR.DACKE = 1

TIOCB1_OE

TIOCB1

TPU.TIOR1.IOB3 = 0,

TPU.TIOR1.IOB[1,0] = 01/10/11

PO13_OE

PO13

NDERH.NDER13 = 1

TEND1B_OE

TEND1 PFCR7.DMAS1[A,B] = 01 DMDR.TENDE = 1

TIOCA1_OE

TIOCA1

TPU.TIOR1.IOA3 = 0,

TPU.TIOR1.IOA[1,0] = 01/10/11

PO12_OE

PO12

NDERH.NDER12 = 1

TIOCD0_OE

TIOCD0

TPU.TMDR.BFB = 0,

TPU.TIORL0.IOD3 = 0,

TPU.TIORL0.IOD[1,0] = 01/10/11

PO11_OE

PO11

NDERH.NDER11 = 1

DACK0B_OE

DACK0 PFCR7.DMAS0[A,B] = 01 DACR.AMS = 1,DMDR.DACKE = 1

TIOCC0_OE

TIOCC0

TPU.TMDR.BFA = 0,

TPU.TIORL0.IOC3 = 0,

TPU.TIORL0.IOD[1,0] = 01/10/11

PO10_OE

PO10

NDERH.NDER10 = 1

TEND0B_OE

TEND0 PFCR7.DMAS0[A,B] = 01 DMDR.TENDE = 1

TIOCB0_OE

TIOCB0

TPU.TIORH0.IOB3 = 0,

TPU.TIORH0.IOB[1,0] = 01/10/11

PO9_OE

PO9

NDERH.NDER9 = 1

TIOCA0_OE

TIOCA0

TPU.TIORH0.IOA3 = 0,

TPU.TIOH0.IOA[1,0] = 01/10/11

PO8_OE

PO8

NDERH.NDER8 = 1

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