H8SXSLASH1663 datasheet(581/1158 Pages) RENESAS

581 / 1158 page

Section 10 16-Bit Timer Pulse Unit (TPU)

Rev.1.00 Jun. 07, 2006 Page 529 of 1102

REJ09B0294-0100

Bit

Bit Name

Initial

value

R/W

Description

TGIED

R/W

TGR Interrupt Enable D

Enables/disables interrupt requests (TGID) by the TGFD

bit when the TGFD bit in TSR is set to 1 in channels 0

and 3.

In channels 1, 2, 4, and 5, bit 3 is reserved. It is always

read as 0 and cannot be modified.

0: Interrupt requests (TGID) by TGFD bit disabled

1: Interrupt requests (TGID) by TGFD bit enabled

TGIEC

R/W

TGR Interrupt Enable C

Enables/disables interrupt requests (TGIC) by the TGFC

bit when the TGFC bit in TSR is set to 1 in channels 0

and 3.

In channels 1, 2, 4, and 5, bit 2 is reserved. It is always

read as 0 and cannot be modified.

0: Interrupt requests (TGIC) by TGFC bit disabled

1: Interrupt requests (TGIC) by TGFC bit enabled

TGIEB

R/W

TGR Interrupt Enable B

Enables/disables interrupt requests (TGIB) by the TGFB

bit when the TGFB bit in TSR is set to 1.

0: Interrupt requests (TGIB) by TGFB bit disabled

1: Interrupt requests (TGIB) by TGFB bit enabled

TGIEA

R/W

TGR Interrupt Enable A

Enables/disables interrupt requests (TGIA) by the TGFA

bit when the TGFA bit in TSR is set to 1.

0: Interrupt requests (TGIA) by TGFA bit disabled

1: Interrupt requests (TGIA) by TGFA bit enabled

H8SX/1663 Datenblatt(PDF) 581 Page - Renesas Technology Corp

H8SX/1663 Datenblatt(HTML) 581 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datenblatt Download

Link URL