H8SXSLASH1663R datasheet(686/1504 Pages) RENESAS

686 / 1504 page

Section 13 I/O Ports

Rev. 2.00 Sep. 24, 2008 Page 654 of 1468

REJ09B0412-0200

Port

Output

Specification

Signal Name

Output

Signal

Name

Signal Selection

Peripheral Module Settings

TIOCB5_OE

TIOCB5

TPU.TIOR_5.IOB3 = 0,

TPU.TIOR_5.IOB[1,0] = 01/10/11

PO7_OE

PO7

NDERL.NDER7 = 1

TIOCA5_OE

TIOCA5

TPU.TIOR_5.IOA3 = 0,

TPU.TIOR_5.IOA[1,0] = 01/10/11

TMO1_OE

TMO1

TMR.TCSR_1.OS3,2 = 01/10/11 or

TMR.TCSR_1.OS[1,0] = 01/10/11

TxD1_OE

TxD1

SCR.TE = 1

PO6_OE

PO6

NDERL.NDER6 = 1

TIOCA4_OE

TIOCA4

TPU.TIOR_4.IOA3 = 0,

TPU.TIOR_4.IOA[1,0] = 01/10/11

PO5_OE

PO5

NDERL.NDER5 = 1

TIOCB4_OE

TIOCB4

TPU.TIOR_4.IOB3 = 0,

TPU.TIOR_4.IOB[1,0] = 01/10/11

SCK1_OE

SCK1

When SCMR.SMIF = 1:

SCR.TE = 1 or SCR.RE = 1 while

SMR.GM = 0, SCR.CKE [1, 0] = 01 or while

SMR.GM = 1

When SCMR.SMIF = 0:

SCR.TE = 1 or SCR.RE = 1 while

SMR.C/A = 0, SCR.CKE [1, 0] = 01 or while

SMR.C/A = 1, SCR.CKE 1 = 0

PO4_OE

PO4

NDERL.NDER4 = 1

TIOCD3_OE

TIOCD3

TPU.TMDR.BFB = 0,

TPU.TIORL_3.IOD3 = 0,

TPU.TIORL_3.IOD[1,0] = 01/10/11

PO3_OE

PO3

NDERL.NDER3 = 1

TIOCC3_OE

TIOCC3

TPU.TMDR.BFA = 0,

TPU.TIORL_3.IOC3 = 0,

TPU.TIORL_3.IOD[1,0] = 01/10/11

TMO0_OE

TMO0

TMR.TCSR_0.OS[3,2] = 01/10/11 or

TMR.TCSR_0.OS[1,0] = 01/10/11

TxD0_OE

TxD0

SCR.TE = 1

PO2_OE

PO2

NDERL.NDER2 = 1

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