H8SXSLASH1663R datasheet(688/1504 Pages) RENESAS

688 / 1504 page

Section 13 I/O Ports

Rev. 2.00 Sep. 24, 2008 Page 656 of 1468

REJ09B0412-0200

Port

Output

Specification

Signal Name

Output

Signal

Name

Signal Selection

Peripheral Module Settings

ETEND3_OE

ETEND3

PFCR8.EDMAS3[A,B] =

SYSCR.EXPE = 1, EDMDR_3.ETENDE = 1

TEND1B_OE

TEND1

PFCR7.DMAS1[A,B] =

DMDR_1.TENDE = 1

TIOCA1_OE

TIOCA1

TPU.TIOR_1.IOA3 = 0,

TPU.TIOR_1.IOA[1,0] = 01/10/11

PO12_OE

PO12

NDERH.NDER12 = 1

TIOCD0_OE

TIOCD0

TPU.TMDR.BFB = 0,

TPU.TIORL_0.IOD3 = 0,

TPU.TIORL_0.IOD[1,0] = 01/10/11

PO11_OE

PO11

NDERH.NDER11 = 1

EDACK2_OE

EDACK2

PFCR8.EDMAS2[A,B] =

SYSCR.EXPE = 1, EDACR_2.AMS = 1,

EDMDR_2.EDACKE = 1

DACK0B_OE

DACK0

PFCR7.DMAS0[A,B] =

DMAC.DACR.AMS = 1,

DMDR_0.DACKE = 1

TIOCC0_OE

TIOCC0

TPU.TMDR.BFA = 0,

TPU.TIORL_0.IOC3 = 0,

TPU.TIORL_0.IOD[1,0] = 01/10/11

PO10_OE

PO10

NDERH.NDER10 = 1

ETEND2_OE

ETEND2

PFCR8.EDMAS2[A,B] =

SYSCR.EXPE = 1, EDMDR_2.ETENDE = 1

TEND0B_OE

TEND0

PFCR7.DMAS0[A,B] =

DMDR_0.TENDE = 1

TIOCB0_OE

TIOCB0

TPU.TIORH_0.IOB3 = 0,

TPU.TIORH_0.IOB[1,0] = 01/10/11

PO9_OE

PO9

NDERH.NDER9 = 1

TIOCA0_OE

TIOCA0

TPU.TIORH_0.IOA3 = 0,

TPU.TIORH_0.IOA[1,0] = 01/10/11

PO8_OE

PO8

NDERH.NDER8 = 1

EDACK1B_OE EDACK1

PFCR8.EDMAS1[A,B] =

SYSCR.EXPE = 1, EDACR_1.AMS = 1,

EDMDR_1.EDACKE = 1

DACK3_OE

DACK3

PFCR7.DMAS3[A,B] =

DMAC.DACR_3.AMS = 1,

DMDR_3.DACKE = 1

TMO3_OE

TMO3

TMR.TCSR_3.OS[3,2] = 01/10/11 or

TMR.TCSR_3.OS[1,0] = 01/10/11

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