H8SXSLASH1663R datasheet(830/1504 Pages) RENESAS

830 / 1504 page

Section 15 Programmable Pulse Generator (PPG)

Rev. 2.00 Sep. 24, 2008 Page 798 of 1468

REJ09B0412-0200

15.4.2

Sample Setup Procedure for Normal Pulse Output

Figures 15.5 and 15.6 show a sample procedure for setting up normal pulse output.

• Sample Setup Procedure for PPG0

Select TGR functions

[1]

Set TGRA value

Set counting operation

Select interrupt request

Set initial output data

Enable pulse output

Select output trigger

Set next pulse

output data

Start counter

Set next pulse

output data

Normal PPG output

Yes

TPU0 setup

PPG0 setup

TPU0 setup

[2]

[3]

[4]

[5]

[6]

[7]

[8]

[9]

[10]

Compare match?

[1]

Set TIOR in TPU0 to make TGRA an

output compare register (with output

disabled).

[2]

Set the PPG output trigger cycle.

[3]

Select the counter clock source with bits

TPSC2 to TPSC0 in TCR. Select the

counter clear source with bits CCLR1 and

CCLR0.

[4]

Enable the TGIA interrupt in TIER. The

DTC or DMAC can also be set up to

transfer data to NDR.

[5]

Set the initial output values in PODR.

[6]

Set the bits in NDER for the pins to be

used for pulse output to 1.

[7]

Select the TPU compare match event to

be used as the output trigger in PCR.

[8]

Set the next pulse output values in NDR.

[9]

Set the CST bit in TSTR to 1 to start the

TCNT counter.

[10] At each TGIA interrupt, set the next

Figure 15.5 Setup Procedure for Normal Pulse Output (PPG0)

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