H8SXSLASH1663R datasheet(832/1504 Pages) RENESAS

832 / 1504 page

Section 15 Programmable Pulse Generator (PPG)

Rev. 2.00 Sep. 24, 2008 Page 800 of 1468

REJ09B0412-0200

15.4.3

Example of Normal Pulse Output (Example of 5-Phase Pulse Output)

Figure 15.7 shows an example in which pulse output is used for cyclic 5-phase pulse output.

TCNT value

TCNT

TGRA

H'0000

NDRH

PODRH

PO15

PO14

PO13

PO12

PO11

Time

Compare match

Figure 15.7 Normal Pulse Output Example (5-Phase Pulse Output)

1. Set up TGRA in TPU which is used as the output trigger to be an output compare register. Set

a cycle in TGRA so the counter will be cleared by compare match A. Set the TGIEA bit in

TIER to 1 to enable the compare match/input capture A (TGIA) interrupt.

2. Write H'F8 to NDERH, and set bits G3CMS1, G3CMS0, G2CMS1, and G2CMS0 in PCR to

select compare match in the TPU channel set up in the previous step to be the output trigger.

Write output data H'80 in NDRH.

3. The timer counter in the TPU channel starts. When compare match A occurs, the NDRH

contents are transferred to PODRH and output. The TGIA interrupt handling routine writes the

next output data (H'C0) in NDRH.

4. 5-phase pulse output (one or two phases active at a time) can be obtained subsequently by

writing H'40, H'60, H'20, H'30, H'10, H'18, H'08, H'88... at successive TGIA interrupts.

If the DTC or DMAC is set for activation by the TGIA interrupt, pulse output can be obtained

without imposing a load on the CPU.

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