H8SXSLASH1663M datasheet(509/1504 Pages) RENESAS

509 / 1504 page

Section 11 EXDMA Controller (EXDMAC)

Rev. 2.00 Sep. 24, 2008 Page 477 of 1468

REJ09B0412-0200

Bit

Bit Name

Initial

value

R/W

Description

DARIE

R/W

Destination Address Extended Repeat Area Overflow

Interrupt Enable

Enables or disables a destination address extended

repeat area overflow interrupt request.

When this bit is set to 1, in the event of destination

address extended repeat area overflow, the DTE bit in

EDMDR is cleared to 0. At the same time, the ESIF bit

in EDMDR is set to 1 to indicate that a destination

address extended repeat area overflow interrupt is

requested.

When used together with block transfer mode, an

interrupt is requested at the end of a block-size transfer.

If DTE bit is set to 1 in EDMDR for the channel on

which transfer is terminated by an interrupt, transfer can

be resumed from the state in which it ended. If a

destination address extended repeat area is not

designated, the specification by this bit is ignored.

0: Destination address extended repeat area overflow

interrupt request disabled

1: Destination address extended repeat area overflow

interrupt request enabled

6, 5



All 0

Reserved

They are always read as 0 and cannot be modified.

DARA4

DARA3

DARA2

DARA1

DARA0

R/W

Destination Address Extended Repeat Area

These bits specify the destination address (EDDAR)

extended repeat area.

The extended repeat area function updates the

specified lower address bits, leaving the remaining

upper address bits always the same. An extended

repeat area size of 4 bytes to 128 Mbytes can be

specified. The setting interval is a power-of-two number

of bytes.

When extended repeat area overflow results from

incrementing or decrementing an address, the lower

address is the start address of the extended repeat

area in the case of address incrementing, or the last

address of the extended repeat area in the case of

address decrementing.

If the DARIE bit is set to 1, an interrupt can be

requested when an extended repeat area overflow

occurs.

Table 11.3 shows the settings and ranges of the

extended repeat area.

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