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ATmega16HVB Datenblatt(PDF) 49 Page - ATMEL Corporation |
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ATmega16HVB Datenblatt(HTML) 49 Page - ATMEL Corporation |
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49 / 273 page ![]() 49 8042A–AVR–07/09 ATmega16HVB/32HVB 11.5 Register Description 11.5.1 MCUSR – MCU Status Register The MCU Status Register provides information on which reset source caused an MCU reset. • Bits 7:5 – Res: Reserved Bits These bits are reserved bits in the ATmega16HVB/32HVB, and will always read as zero. • Bit 4 – OCDRF: OCD Reset Flag This bit is set if a debugWIRE Reset occurs. The bit is reset by a Power-on Reset, or by writing a logic zero to the flag. • Bit 3 – WDRF: Watchdog Reset Flag This bit is set if a Watchdog Reset occurs. The bit is reset by a Power-on Reset, or by writing a logic zero to the flag. • Bit 2 – BODRF: Brown-out Reset Flag This bit is set if a Brown-out Reset occurs. In the case of a Power-on Reset, both the BODRF and the PORF will be set. The BODRF is reset by writing a logic zero to the flag. • Bit 1 – EXTRF: External Reset Flag This bit is set if an External Reset occurs. The bit is reset by a Power-on Reset, or by writing a logic zero to the flag. • Bit 0 – PORF: Power-on Reset Flag This bit is set if a Power-on Reset occurs. The bit is reset only by writing a logic zero to the flag. To make use of the Reset flags to identify a reset condition, the user should read and then reset the MCUSR as early as possible in the program. If the register is cleared before another reset occurs, the source of the reset can be found by examining the reset flags. 11.5.2 WDTCSR – Watchdog Timer Control Register • Bit 7 - WDIF: Watchdog Interrupt Flag This bit is set when a time-out occurs in the Watchdog Timer and the Watchdog Timer is config- ured for interrupt. WDIF is cleared by hardware when executing the corresponding interrupt handling vector. Alternatively, WDIF is cleared by writing a logic one to the flag. When the I-bit in SREG and WDIE are set, the Watchdog Time-out Interrupt is executed. Bit 7 6 543210 0x34 (0x54) – – – OCDRF WDRF BODRF EXTRF PORF MCUSR Read/Write R R R R/W R/W R/W R/W R/W Initial Value 0 0 0 See Bit Description Bit 765 432 10 (0x60) WDIF WDIE WDP3 WDCE WDE WDP2 WDP1 WDP0 WDTCSR Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Initial Value 0 0 0 0 X 0 0 0 |
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