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PBSS302ND Datenblatt(PDF) 3 Page - NXP Semiconductors |
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PBSS302ND Datenblatt(HTML) 3 Page - NXP Semiconductors |
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3 / 14 page ![]() PBSS302ND_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 18 February 2008 3 of 14 NXP Semiconductors PBSS302ND 40 V, 4 A NPN low VCEsat (BISS) transistor [1] Device mounted on a ceramic PCB, Al2O3, standard footprint. [2] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. [3] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2. [4] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 6 cm2. [5] Operated under pulsed conditions: Duty cycle δ≤ 10 % and pulse width tp ≤ 10 ms. Tj junction temperature - 150 °C Tamb ambient temperature −65 +150 °C Tstg storage temperature −65 +150 °C (1) Ceramic PCB, Al2O3, standard footprint (2) FR4 PCB, mounting pad for collector 6 cm2 (3) FR4 PCB, mounting pad for collector 1 cm2 (4) FR4 PCB, standard footprint Fig 1. Power derating curves Table 5. Limiting values …continued In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit (1) Tamb (°C) −75 175 125 25 75 −25 006aaa270 800 400 1200 1600 Ptot (mW) 0 (2) (4) (3) |
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