TLE4953

TLE4953C

Data Sheet

10

V 4.0, 2010-04

Systematic phase error of

output edges during

start-up and uncalibrated

mode

– 88

+ 88

°

Systematical

phase error of

"uncal" pulse; nth

vs. n+1th pulse

(does not include

jitter)

Phase shift during

transition from

uncalibrated to calibrated

mode

∆Φ

switch

– 90

+ 90

°

Phase shift change

during PGA switching in

calibrated mode

0

80

°

Due to adaptive

hysteresis.

Depending on

signal shape.

Magnetic differential field

change required for

startup with 1st rising

edge

Limit,

early startup

peak to peak

value

Limit, early startup

3.5

mT

Jitter,

T

T

f

≤ 2500 Hz

S

Jit-far

–

–

–

–

± 2

± 3

%

σ value

V

Jitter,

T

T

2500 Hz < f

≤12000 Hz

S

Jit-far

–

–

–

–

± 3

± 4.5

%

5) 1 σ value

V

Jitter at board net ripple

S

Jit-AC

–

–

± 2

%

5)V

Vpp

0

1) magnetic amplitude values, sine magnetic field, Limits refer to the 50% criteria. 50% of pulses are missing.Only valid at

lowest PGA stage/highest amplification because of adaptive hysteresis.

2) Magnetic peak to peak value. Limits refer to the 99% criteria, just 1 pulse missing out of 100.

3) The first 2 pulses may contain only direction information if the direction signal is above

∆

B

will be the speed pulse.

4) High frequency behaviour not subject to production test - verified by design/characterization.

AC/DC Characteristics (cont’d)

All values specified at constant amplitude and offset of input signal, over operating range, unless

Parameter

Symbol

Limit Values

Unit

Remarks

min.

typ.

max.