DM9620 datasheet(13/71 Pages) DAVICOM

13 / 71 page

DM9620

USB2.0 to Fast Ethernet Controller

Preliminary

Version: DM9620 -15-DS-P02

February 20, 2012

Flash if traffic on Ethernet

3.2.7 10/100 PHY

Fiber Signal Detection

RXGND

RX ground.

BGGND

Bandgap ground.

BGRES

I/O

Bandgap pin. Connect 6.98K 1% resister to BGGND

AVCC18

1.8V power out for RX power

RX+

I/O

TP RX input

RX-

I/O

TP RX input

RXGND

RX ground

TXGND

TX ground

TX+

I/O

TP TX output

TX-

I/O

TP TX output

AVCC18

1.8V power out for TX power

3.2.8 Miscellaneous

SMI_D

Serial Management Interface Data

Tie to ground in application.

SMI_CK

Serial Management Interface Clock

Tie to ground in application..

This pin can also as a GPIO wakeup event defined in register 0FH.

VBUS_IN

VBUS input (Connect to USB5V, USB connector)

Tie to high in bus power mode

WOL

Issue a wake-up signal when wake-up event happens.

RSTB

Hardware Reset

Active low signal to initiate the DM9620.

TEST2

Test Mode 2, tie to ground in application.

TEST1

Test Mode 1

0: pins 11-13,15-16,18-22,24-27,33-34 as MII, RMII, Reverse MII

interface

1: pins 11-13,15-16,18-22,24-27,33-34 as GPIO controlled by

registers 34H~37H

3.2.9 Power

14,32,43,

VCC3

Digital VCC 3.3V

17,23,37,

46,62

GND

Digital GND

3.2.10 GPIO (TEST1 set to 1)

Pin No.

Pin Name

Type

Description

GPIO2_0

I/O

GPIO2_0 in GPIO mode

12,13,15,16

GPIO2_1~4

I/O

GPIO2_1~4 in GPIO mode

GPIO2_5

I/O

GPIO2_5 in GPIO mode

DM9620 Datenblatt(PDF) 13 Page - Davicom Semiconductor, Inc.

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