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TMS570LS3134 Datenblatt(PDF) 52 Page - Texas Instruments |
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TMS570LS3134 Datenblatt(HTML) 52 Page - Texas Instruments |
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52 / 155 page ![]() 3.3 V V CCIOPORH 1.2 V V CCPORH V CCIOPORL V (1.2 V) V / V (3.3 V) CC CCIO CCP nPORRST 8 6 6 7 7 9 3 V CCPORL V IL(PORRST) V / V CCIO CCP V CC V CCPORL V IL(PORRST) V IL V IL V IL V CCIOPORH V CCPORH V CCIOPORL NOTE: There is no timing dependency between the ramp of the VCCIO and the VCC supply voltage; this is just an exemplary drawing. TMS570LS3134 TMS570LS2134 TMS570LS2124 SPNS165 – SEPTEMBER 2011 www.ti.com 4.3.2 Power-Down Sequence The different supplies to the device can be powered down in any order. 4.3.3 Power-On Reset: nPORRST This is the power-on reset. This reset must be asserted by an external circuitry whenever the I/O or core supplies are outside the specified recommended range. This signal has a glitch filter on it. It also has an internal pulldown. 4.3.3.1 nPORRST Electrical and Timing Requirements Table 4-4. Electrical Requirements for nPORRST NO Parameter MIN MAX Unit VCCPORL VCC low supply level when nPORRST must be active during 0.5 V power-up VCCPORH VCC high supply level when nPORRST must remain active during 1.14 V power-up and become active during power down VCCIOPORL VCCIO / VCCP low supply level when nPORRST must be active during 1.1 V power-up VCCIOPORH VCCIO / VCCP high supply level when nPORRST must remain active 3.0 V during power-up and become active during power down VIL(PORRST) Low-level input voltage of nPORRST VCCIO > 2.5V 0.2 * VCCIO V Low-level input voltage of nPORRST VCCIO < 2.5V 0.5 V 3 tsu(PORRST) Setup time, nPORRST active before VCCIO and VCCP > VCCIOPORL 0 ms during power-up 6 th(PORRST) Hold time, nPORRST active after VCC > VCCPORH 1 ms 7 tsu(PORRST) Setup time, nPORRST active before VCC < VCCPORH during power 2 µs down 8 th(PORRST) Hold time, nPORRST active after VCCIO and VCCP > VCCIOPORH 1 ms 9 th(PORRST) Hold time, nPORRST active after VCC < VCCPORL 0 ms tf(nPORRST) 500 2000 ns Filter time nPORRST pin; pulses less than MIN will be filtered out, pulses greater than MAX will generate a reset. Figure 4-1. nPORRST Timing Diagram 52 System Information and Electrical Specifications Copyright © 2011, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com: TMS570LS3134 TMS570LS2134 TMS570LS2124 |
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