SPEAR1340 datasheet(38/200 Pages) STMICROELECTRONICS

Teilenummer	SPEAR1340

Bauteilbeschribung	Dual-core Cortex A9 HMI embedded MPU

PDF	200 Pages

Scroll/Zoom	100%

Hersteller	STMICROELECTRONICS [STMicroelectronics]

Direct Link	http://www.st.com

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38 / 200 page

Device functions

SPEAr1340

38/200

Doc ID 023063 Rev 4

2.38

One-time programmable antifuse (OTP)

The OTP block is an array of one-time programmable antifuse memory cells. All OTP banks

feature an embedded charge pump which provides internally the high voltage necessary for

antifuse programming sessions. Therefore, it is not necessary to use an additional high

voltage pad at the chip interface. OTP is software programmable, so no dedicated

programming interface is needed at chip level.

Main features:

OTP embeds three 255-bit banks, with these features:

●

BANK 1: 255-bit data bank with write-protect mechanism

●

BANK 2: 255-bit data bank with write-protect mechanism

●

BANK M: 255-bit bank, logically partitioned as follows:

–

32 bits (16 + redundancy) used for BANK1/BANK2 write protection

–

213 bits BootROM controlled

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2 bits reserved

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2 bits reserved for disabling TEST access to OTP

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2 bits reserved for disabling JTAG access

–

4 bits BootROM controlled

SPEAR1340 Datenblatt(PDF) 38 Page - STMicroelectronics