USB4624 datasheet(37/68 Pages) SMSC

37 / 68 page

USB 2.0 HSIC Hi-Speed 4-Port Hub Controller

Datasheet

SMSC USB4624

Revision 1.0 (06-17-13)

DATASHEET

7.2.1

SMBus Run Time Accessible Registers

Table 7.1 provides a summary of the SMBus accessible run time registers. Each register is detailed in

the subsequent tables.

Note: The SMBus page register must be configured to allow the SOC to access the proper register

space. Refer to Section 7.2.2, "Run Time SMBus Page Register," on page 48 for details.

Table 7.1 SMBus Accessible Run Time Registers

NAME

XDATA

ADDR

UP_BC_DET

0x30E2

Table 7.2, "Upstream Battery Charging Detection Control Register"

UP_CUST_BC_CTL

0x30E3

Table 7.3, "Upstream Custom Battery Charger Control Register"

UP_CUST_BC_STAT

0x30E4

Table 7.4, "Upstream Custom Battery Charger Status Register"

PORT_PWR_STAT

0x30E5

Table 7.5, "Port Power Status Register"

OCS_STAT

0x30E6

Table 7.6, "OCS Status Register"

BC_CHG_MODE

0x30EC

Table 7.7, "Upstream Battery Charger Mode Register"

CHG_DET_MSK

0x30ED

Table 7.8, "Charge Detect Mask Register"

CFGP

0x30EE

Table 7.9, "Configure Portable Hub Register"

PSELSUSP

0x318B

Table 7.10, "Port Select and Low-Power Suspend Register"

CONNECT_CFG

0x318E

Table 7.11, "Connect Configuration Register"

BC_CTL_1 (Upstream)

0x6100

Table 7.12, "Upstream (Port 0) Battery Charging Control 1 Register"

BC_CTL_2

(Upstream)

0x6101

Table 7.13, "Upstream (Port 0) Battery Charging Control 2 Register"

BC_CTL_RUN_TIME

(Upstream)

0x6102

Table 7.14, "Upstream (Port 0) Battery Charging Run Time Control

BC_CTL_DET

(Upstream)

0x6103

Table 7.15, "Upstream (Port 0) Battery Charging Detect Register"

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