HEF4014B datasheet(5/14 Pages) NXP

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HEF4014B

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Product data sheet

Rev. 8 — 21 November 2011

5 of 14

NXP Semiconductors

HEF4014B

8-bit static shift register

Recommended operating conditions

10. Static characteristics

Table 5.

Recommended operating conditions

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VDD

supply voltage

input voltage

VDD

Tamb

ambient temperature

in free air

40

+85

C

t/V

input transition rise and fall rate

VDD = 5 V

--3.75

s/V

VDD = 10 V

--0.5

s/V

VDD = 15 V

--0.08

s/V

Table 6.

Static characteristics

VSS = 0 V; VI = VSS or VDD unless otherwise specified.

Symbol Parameter

Conditions

VDD

Tamb = 40 C

Tamb = +25 C

Tamb = +85 C Unit

Min

Max

Min

Max

Min

Max

VIH

HIGH-level input voltage

I

O < 1 A

5 V

3.5

10 V

7.0

15 V

11.0

VIL

LOW-level input voltage

I

O < 1 A

5 V

1.5-1.5-1.5

10 V

3.0

15 V

4.0

VOH

HIGH-level output voltage

I

O < 1 A

5 V

4.95

10 V

9.95

15 V

14.95

VOL

LOW-level output voltage

|IO < 1 A

5 V

0.05

10 V

0.05

15 V

0.05

IOH

HIGH-level output current

VO = 2.5 V

5 V

1.7

1.4

1.1

VO = 4.6 V

5 V

0.52

0.44

0.36 mA

VO = 9.5 V

10 V

1.3

1.1

0.9

VO = 13.5 V

15 V

3.6

3.0

2.4

IOL

LOW-level output current

VO = 0.4 V

5 V

0.52

0.44

0.36

VO = 0.5 V

10 V

1.3

1.1

0.9

VO = 1.5 V

15 V

3.6

3.0

2.4

input leakage current

15 V

0.3

1.0

A

IDD

supply current

IO = 0 A

5 V

150

A

10 V

300

A

15 V

600

A

input capacitance

7.5

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