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ADSP-21486KSWZ-2AB Datenblatt(PDF) 26 Page - Analog Devices |
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ADSP-21486KSWZ-2AB Datenblatt(HTML) 26 Page - Analog Devices |
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26 / 68 page ![]() Rev. B | Page 26 of 68 | March 2013 ADSP-21483/ADSP-21486/ADSP-21487/ADSP-21488/ADSP-21489 Reset Running Reset The following timing specification applies to RESETOUT/RUNRSTIN pin when it is configured as RUNRSTIN. Table 21. Reset Parameter Min Max Unit Timing Requirements tWRST 1 RESET Pulse Width Low 4 × tCK ns tSRST RESET Setup Before CLKIN Low 8 ns 1 Applies after the power-up sequence is complete. At power-up, the processor’s internal phase-locked loop requires no more than 100 μ while RESET is low, assuming stable VDD and CLKIN (not including start-up time of external clock oscillator). Figure 8. Reset CLKIN RESET tSRST tWRST Table 22. Running Reset Parameter Min Max Unit Timing Requirements tWRUNRST Running RESET Pulse Width Low 4 × tCK ns tSRUNRST Running RESET Setup Before CLKIN High 8 ns Figure 9. Running Reset CLKIN RUNRSTIN tWRUNRST tSRUNRST |
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