ST8024LACDR datasheet(16/35 Pages) STMICROELECTRONICS

16 / 35 page

Electrical characteristics

ST8024L

16/35

Doc ID 17709 Rev 5

Table 17.

Card presence inputs (pins PRES and PRES)

Symbol

Parameter(1)

Test conditions

Min.

Typ.

Max.

Unit

VIL

Low level input voltage

-0.3

0.3 VDD

VIH

High level input voltage

0.7 VDD

-VDD +0.3

|ILIH|

High level input leakage

current

VIH = VDD

-5

µA

|ILIL|

Low level input leakage

current

VIL = 0

µA

VDD = 3.3 V, VDDP = 5 V, fXTAL = 10 MHz, unless otherwise noted. Typical values are at TA = 25 °C

Pin PRES is active low; pin PRES is active high, see Figure 8 and Figure 9; PRES has an integrated 1.25 µA current source

to GND. (PRES to VDD); the card is considered present if at least one of the inputs PRES or PRES is active.

Table 18.

Interrupt output (pin OFF NMOS drain with integrated 20 k

Ω pull-up resistor to VDD)

Symbol

Parameter(1)

Test conditions

Min.

Typ.

Max.

Unit

VOL

Low level output voltage

IOL = 2 mA

0.3

VOH

High level output voltage

IOH = –15 µA

0.75 VDD

RPU

Integrated pull-up resistor

20 k

Ω pull-up resistor to VDD

VDD = 3.3 V, VDDP = 5 V, fXTAL = 10 MHz, unless otherwise noted. Typical values are at TA = 25 °C.

Table 19.

Protection and limitation

Symbol

Parameter(1)

Test conditions

Min.

Typ.

Max.

Unit

|ICC(SD)|

Shutdown and limitation current pin VCC

120

II/O(lim)

Limitation current pins I/O, AUX1 and AUX2

–15

ICLK(lim)

Limitation current pin CLK

–70

IRST(lim)

Limitation current pin RST

–20

TSD

Shutdown temperature

150

°C

VDD = 3.3 V, VDDP = 5 V, fXTAL = 10 MHz, unless otherwise noted. Typical values are at TA = 25 °C.

Table 20.

Timing

Symbol

Parameter(1)

Test conditions

Min.

Typ.

Max.

Unit

tACT

Activation time

For VCC = 5 V

(See Figure 5)

220

µs

tDE

Deactivation time

(See Figure 7)50

100

µs

Start of the window for sending CLK to card (See Figure 6)130

µs

End of the window for sending CLK to card

(See Figure 6)

140

µs

tdebounce

Debounce time pins PRES and PRES

(See Figure 8)5

VDD = 3.3 V, VDDP = 5 V, fXTAL = 10 MHz, unless otherwise noted. Typical values are at TA = 25 °C.

ST8024LACDR Datenblatt(PDF) 16 Page - STMicroelectronics

ST8024LACDR Datenblatt(HTML) 16 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35

Datenblatt Download

Link URL